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drm/amd: Duplicate DC_FEATURE_MASK and DC_DEBUG_MASK enum values into kdoc
[Why] When kernel documentation is generated the enum values themselves don't end up in the documentation. This makes browsing them in HTML a lot less useful. [How] Copy DC_DEBUG_MASK and DC_FEATURE_MASK enum values into matching kdoc comments. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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committed by
Alex Deucher
parent
efbacd8aea
commit
e0dd9b8e9e
@@ -210,4 +210,4 @@ IP Blocks
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:doc: IP Blocks
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.. kernel-doc:: drivers/gpu/drm/amd/include/amd_shared.h
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:identifiers: amd_ip_block_type amd_ip_funcs DC_DEBUG_MASK
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:identifiers: amd_ip_block_type amd_ip_funcs DC_FEATURE_MASK DC_DEBUG_MASK
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@@ -239,18 +239,51 @@ enum amd_harvest_ip_mask {
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AMD_HARVEST_IP_DMU_MASK = 0x4,
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};
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/**
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* enum DC_FEATURE_MASK - Bits that control DC feature defaults
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*/
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enum DC_FEATURE_MASK {
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//Default value can be found at "uint amdgpu_dc_feature_mask"
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DC_FBC_MASK = (1 << 0), //0x1, disabled by default
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DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1), //0x2, enabled by default
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DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2), //0x4, disabled by default
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DC_PSR_MASK = (1 << 3), //0x8, disabled by default for dcn < 3.1
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DC_EDP_NO_POWER_SEQUENCING = (1 << 4), //0x10, disabled by default
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DC_DISABLE_LTTPR_DP1_4A = (1 << 5), //0x20, disabled by default
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DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default
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DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default
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DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default
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DC_REPLAY_MASK = (1 << 9), //0x200, disabled by default for dcn < 3.1.4
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/**
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* @DC_FBC_MASK: (0x1) disabled by default
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*/
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DC_FBC_MASK = (1 << 0),
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/**
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* @DC_MULTI_MON_PP_MCLK_SWITCH_MASK: (0x2) enabled by default
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*/
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DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1),
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/**
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* @DC_DISABLE_FRACTIONAL_PWM_MASK: (0x4) disabled by default
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*/
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DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2),
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/**
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* @DC_PSR_MASK: (0x8) disabled by default for DCN < 3.1
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*/
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DC_PSR_MASK = (1 << 3),
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/**
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* @DC_EDP_NO_POWER_SEQUENCING: (0x10) disabled by default
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*/
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DC_EDP_NO_POWER_SEQUENCING = (1 << 4),
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/**
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* @DC_DISABLE_LTTPR_DP1_4A: (0x20) disabled by default
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*/
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DC_DISABLE_LTTPR_DP1_4A = (1 << 5),
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/**
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* @DC_DISABLE_LTTPR_DP2_0: (0x40) disabled by default
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*/
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DC_DISABLE_LTTPR_DP2_0 = (1 << 6),
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/**
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* @DC_PSR_ALLOW_SMU_OPT: (0x80) disabled by default
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*/
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DC_PSR_ALLOW_SMU_OPT = (1 << 7),
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/**
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* @DC_PSR_ALLOW_MULTI_DISP_OPT: (0x100) disabled by default
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*/
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DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8),
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/**
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* @DC_REPLAY_MASK: (0x200) disabled by default for DCN < 3.1.4
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*/
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DC_REPLAY_MASK = (1 << 9),
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};
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/**
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@@ -258,64 +291,64 @@ enum DC_FEATURE_MASK {
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*/
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enum DC_DEBUG_MASK {
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/**
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* @DC_DISABLE_PIPE_SPLIT: If set, disable pipe-splitting
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* @DC_DISABLE_PIPE_SPLIT: (0x1) If set, disable pipe-splitting
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*/
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DC_DISABLE_PIPE_SPLIT = 0x1,
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/**
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* @DC_DISABLE_STUTTER: If set, disable memory stutter mode
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* @DC_DISABLE_STUTTER: (0x2) If set, disable memory stutter mode
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*/
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DC_DISABLE_STUTTER = 0x2,
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/**
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* @DC_DISABLE_DSC: If set, disable display stream compression
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* @DC_DISABLE_DSC: (0x4) If set, disable display stream compression
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*/
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DC_DISABLE_DSC = 0x4,
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/**
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* @DC_DISABLE_CLOCK_GATING: If set, disable clock gating optimizations
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* @DC_DISABLE_CLOCK_GATING: (0x8) If set, disable clock gating optimizations
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*/
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DC_DISABLE_CLOCK_GATING = 0x8,
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/**
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* @DC_DISABLE_PSR: If set, disable Panel self refresh v1 and PSR-SU
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* @DC_DISABLE_PSR: (0x10) If set, disable Panel self refresh v1 and PSR-SU
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*/
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DC_DISABLE_PSR = 0x10,
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/**
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* @DC_FORCE_SUBVP_MCLK_SWITCH: If set, force mclk switch in subvp, even
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* @DC_FORCE_SUBVP_MCLK_SWITCH: (0x20) If set, force mclk switch in subvp, even
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* if mclk switch in vblank is possible
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*/
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DC_FORCE_SUBVP_MCLK_SWITCH = 0x20,
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/**
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* @DC_DISABLE_MPO: If set, disable multi-plane offloading
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* @DC_DISABLE_MPO: (0x40) If set, disable multi-plane offloading
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*/
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DC_DISABLE_MPO = 0x40,
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/**
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* @DC_ENABLE_DPIA_TRACE: If set, enable trace logging for DPIA
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* @DC_ENABLE_DPIA_TRACE: (0x80) If set, enable trace logging for DPIA
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*/
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DC_ENABLE_DPIA_TRACE = 0x80,
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/**
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* @DC_ENABLE_DML2: If set, force usage of DML2, even if the DCN version
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* @DC_ENABLE_DML2: (0x100) If set, force usage of DML2, even if the DCN version
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* does not default to it.
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*/
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DC_ENABLE_DML2 = 0x100,
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/**
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* @DC_DISABLE_PSR_SU: If set, disable PSR SU
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* @DC_DISABLE_PSR_SU: (0x200) If set, disable PSR SU
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*/
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DC_DISABLE_PSR_SU = 0x200,
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/**
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* @DC_DISABLE_REPLAY: If set, disable Panel Replay
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* @DC_DISABLE_REPLAY: (0x400) If set, disable Panel Replay
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*/
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DC_DISABLE_REPLAY = 0x400,
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/**
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* @DC_DISABLE_IPS: If set, disable all Idle Power States, all the time.
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* @DC_DISABLE_IPS: (0x800) If set, disable all Idle Power States, all the time.
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* If more than one IPS debug bit is set, the lowest bit takes
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* precedence. For example, if DC_FORCE_IPS_ENABLE and
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* DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes
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@@ -324,56 +357,57 @@ enum DC_DEBUG_MASK {
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DC_DISABLE_IPS = 0x800,
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/**
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* @DC_DISABLE_IPS_DYNAMIC: If set, disable all IPS, all the time,
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* @DC_DISABLE_IPS_DYNAMIC: (0x1000) If set, disable all IPS, all the time,
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* *except* when driver goes into suspend.
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*/
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DC_DISABLE_IPS_DYNAMIC = 0x1000,
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/**
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* @DC_DISABLE_IPS2_DYNAMIC: If set, disable IPS2 (IPS1 allowed) if
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* @DC_DISABLE_IPS2_DYNAMIC: (0x2000) If set, disable IPS2 (IPS1 allowed) if
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* there is an enabled display. Otherwise, enable all IPS.
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*/
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DC_DISABLE_IPS2_DYNAMIC = 0x2000,
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/**
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* @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time.
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* @DC_FORCE_IPS_ENABLE: (0x4000) If set, force enable all IPS, all the time.
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*/
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DC_FORCE_IPS_ENABLE = 0x4000,
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/**
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* @DC_DISABLE_ACPI_EDID: If set, don't attempt to fetch EDID for
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* @DC_DISABLE_ACPI_EDID: (0x8000) If set, don't attempt to fetch EDID for
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* eDP display from ACPI _DDC method.
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*/
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DC_DISABLE_ACPI_EDID = 0x8000,
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/**
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* @DC_DISABLE_HDMI_CEC: If set, disable HDMI-CEC feature in amdgpu driver.
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* @DC_DISABLE_HDMI_CEC: (0x10000) If set, disable HDMI-CEC feature in amdgpu driver.
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*/
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DC_DISABLE_HDMI_CEC = 0x10000,
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/**
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* @DC_DISABLE_SUBVP_FAMS: If set, disable DCN Sub-Viewport & Firmware Assisted
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* @DC_DISABLE_SUBVP_FAMS: (0x20000) If set, disable DCN Sub-Viewport & Firmware Assisted
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* Memory Clock Switching (FAMS) feature in amdgpu driver.
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*/
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DC_DISABLE_SUBVP_FAMS = 0x20000,
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/**
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* @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: If set, disable support for custom brightness curves
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* @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: (0x40000) If set, disable support for custom
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* brightness curves
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*/
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DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE = 0x40000,
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/**
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* @DC_HDCP_LC_FORCE_FW_ENABLE: If set, use HDCP Locality Check FW
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* @DC_HDCP_LC_FORCE_FW_ENABLE: (0x80000) If set, use HDCP Locality Check FW
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* path regardless of reported HW capabilities.
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*/
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DC_HDCP_LC_FORCE_FW_ENABLE = 0x80000,
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/**
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* @DC_HDCP_LC_ENABLE_SW_FALLBACK: If set, upon HDCP Locality Check FW
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* @DC_HDCP_LC_ENABLE_SW_FALLBACK: (0x100000) If set, upon HDCP Locality Check FW
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* path failure, retry using legacy SW path.
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*/
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DC_HDCP_LC_ENABLE_SW_FALLBACK = 0x100000,
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/**
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* @DC_SKIP_DETECTION_LT: If set, skip detection link training
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* @DC_SKIP_DETECTION_LT: (0x200000) If set, skip detection link training
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*/
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DC_SKIP_DETECTION_LT = 0x200000,
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};
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