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drm/i915/guc: Apply Wa_16011777198

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Enable GuC Wa to reset RCS/CCS before it goes into RC6.

Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220415224025.3693037-5-umesh.nerlige.ramappa@intel.com
This commit is contained in:
Vinay Belgaumkar
2022-04-15 15:40:23 -07:00
committed by John Harrison
parent c6b41c4d9b
commit dfa57ecf77
2 changed files with 6 additions and 0 deletions
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5
drivers/gpu/drm/i915/gt/uc/intel_guc.c
View File

@@ -310,6 +310,11 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
if (GRAPHICS_VER(gt->i915) == 12)
flags |= GUC_WA_PRE_PARSER;
/* Wa_16011777198:dg2 */
if (IS_DG2_GRAPHICS_STEP(gt->i915, G10, STEP_A0, STEP_C0) ||
IS_DG2_GRAPHICS_STEP(gt->i915, G11, STEP_A0, STEP_B0))
flags |= GUC_WA_RCS_RESET_BEFORE_RC6;
return flags;
}

1
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
View File

@@ -100,6 +100,7 @@
#define GUC_CTL_WA 1
#define GUC_WA_GAM_CREDITS BIT(10)
#define GUC_WA_DUAL_QUEUE BIT(11)
#define GUC_WA_RCS_RESET_BEFORE_RC6 BIT(13)
#define GUC_WA_PRE_PARSER BIT(14)
#define GUC_WA_POLLCS BIT(18)