mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-02-22 06:32:05 -05:00
Code Issues Packages Projects Releases Wiki Activity

enic: get max rq & wq entries supported by hw, 16K queues

Browse Source 
Enables reading the max rq and wq entries supported from the hw.
Enables 16k rq and wq entries on hw that supports.

Co-developed-by: Nelson Escobar <neescoba@cisco.com>
Signed-off-by: Nelson Escobar <neescoba@cisco.com>
Co-developed-by: John Daley <johndale@cisco.com>
Signed-off-by: John Daley <johndale@cisco.com>
Signed-off-by: Satish Kharat <satishkh@cisco.com>
Link: https://patch.msgid.link/20250304-enic_cleanup_and_ext_cq-v2-8-85804263dad8@cisco.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Satish Kharat
2025-03-04 19:56:44 -05:00
committed by Paolo Abeni
parent 26b2c5f6ff
commit df9fd2a3ce
7 changed files with 39 additions and 24 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
drivers/net/ethernet/cisco/enic/enic_ethtool.c
View File

@@ -222,9 +222,9 @@ static void enic_get_ringparam(struct net_device *netdev,
struct enic *enic = netdev_priv(netdev);
struct vnic_enet_config *c = &enic->config;
ring->rx_max_pending = ENIC_MAX_RQ_DESCS;
ring->rx_max_pending = c->max_rq_ring;
ring->rx_pending = c->rq_desc_count;
ring->tx_max_pending = ENIC_MAX_WQ_DESCS;
ring->tx_max_pending = c->max_wq_ring;
ring->tx_pending = c->wq_desc_count;
}
@@ -252,18 +252,18 @@ static int enic_set_ringparam(struct net_device *netdev,
}
rx_pending = c->rq_desc_count;
tx_pending = c->wq_desc_count;
if (ring->rx_pending > ENIC_MAX_RQ_DESCS ||
if (ring->rx_pending > c->max_rq_ring ||
ring->rx_pending < ENIC_MIN_RQ_DESCS) {
netdev_info(netdev, "rx pending (%u) not in range [%u,%u]",
ring->rx_pending, ENIC_MIN_RQ_DESCS,
ENIC_MAX_RQ_DESCS);
c->max_rq_ring);
return -EINVAL;
}
if (ring->tx_pending > ENIC_MAX_WQ_DESCS ||
if (ring->tx_pending > c->max_wq_ring ||
ring->tx_pending < ENIC_MIN_WQ_DESCS) {
netdev_info(netdev, "tx pending (%u) not in range [%u,%u]",
ring->tx_pending, ENIC_MIN_WQ_DESCS,
ENIC_MAX_WQ_DESCS);
c->max_wq_ring);
return -EINVAL;
}
if (running)

29
drivers/net/ethernet/cisco/enic/enic_res.c
View File

@@ -59,31 +59,38 @@ int enic_get_vnic_config(struct enic *enic)
GET_CONFIG(intr_timer_usec);
GET_CONFIG(loop_tag);
GET_CONFIG(num_arfs);
GET_CONFIG(max_rq_ring);
GET_CONFIG(max_wq_ring);
GET_CONFIG(max_cq_ring);
if (!c->max_wq_ring)
c->max_wq_ring = ENIC_MAX_WQ_DESCS_DEFAULT;
if (!c->max_rq_ring)
c->max_rq_ring = ENIC_MAX_RQ_DESCS_DEFAULT;
if (!c->max_cq_ring)
c->max_cq_ring = ENIC_MAX_CQ_DESCS_DEFAULT;
c->wq_desc_count =
min_t(u32, ENIC_MAX_WQ_DESCS,
max_t(u32, ENIC_MIN_WQ_DESCS,
c->wq_desc_count));
min_t(u32, c->max_wq_ring,
max_t(u32, ENIC_MIN_WQ_DESCS, c->wq_desc_count));
c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
c->rq_desc_count =
min_t(u32, ENIC_MAX_RQ_DESCS,
max_t(u32, ENIC_MIN_RQ_DESCS,
c->rq_desc_count));
min_t(u32, c->max_rq_ring,
max_t(u32, ENIC_MIN_RQ_DESCS, c->rq_desc_count));
c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
if (c->mtu == 0)
c->mtu = 1500;
c->mtu = min_t(u16, ENIC_MAX_MTU,
max_t(u16, ENIC_MIN_MTU,
c->mtu));
c->mtu = min_t(u16, ENIC_MAX_MTU, max_t(u16, ENIC_MIN_MTU, c->mtu));
c->intr_timer_usec = min_t(u32, c->intr_timer_usec,
vnic_dev_get_intr_coal_timer_max(enic->vdev));
dev_info(enic_get_dev(enic),
"vNIC MAC addr %pM wq/rq %d/%d mtu %d\n",
enic->mac_addr, c->wq_desc_count, c->rq_desc_count, c->mtu);
"vNIC MAC addr %pM wq/rq %d/%d max wq/rq/cq %d/%d/%d mtu %d\n",
enic->mac_addr, c->wq_desc_count, c->rq_desc_count,
c->max_wq_ring, c->max_rq_ring, c->max_cq_ring, c->mtu);
dev_info(enic_get_dev(enic), "vNIC csum tx/rx %s/%s "
"tso/lro %s/%s rss %s intr mode %s type %s timer %d usec "

11
drivers/net/ethernet/cisco/enic/enic_res.h
View File

@@ -12,10 +12,13 @@
#include "vnic_wq.h"
#include "vnic_rq.h"
#define ENIC_MIN_WQ_DESCS 64
#define ENIC_MAX_WQ_DESCS 4096
#define ENIC_MIN_RQ_DESCS 64
#define ENIC_MAX_RQ_DESCS 4096
#define ENIC_MIN_WQ_DESCS 64
#define ENIC_MAX_WQ_DESCS_DEFAULT 4096
#define ENIC_MAX_WQ_DESCS 16384
#define ENIC_MIN_RQ_DESCS 64
#define ENIC_MAX_RQ_DESCS 16384
#define ENIC_MAX_RQ_DESCS_DEFAULT 4096
#define ENIC_MAX_CQ_DESCS_DEFAULT (64 * 1024)
#define ENIC_MIN_MTU ETH_MIN_MTU
#define ENIC_MAX_MTU 9000

2
drivers/net/ethernet/cisco/enic/enic_wq.c
View File

@@ -93,7 +93,7 @@ unsigned int enic_wq_cq_service(struct enic *enic, unsigned int cq_index,
u8 type, color;
bool ext_wq;
ext_wq = cq->ring.size > ENIC_MAX_WQ_DESCS;
ext_wq = cq->ring.size > ENIC_MAX_WQ_DESCS_DEFAULT;
cq_desc = (struct cq_desc *)vnic_cq_to_clean(cq);
enic_wq_cq_desc_dec(cq_desc, ext_wq, &type, &color,

5
drivers/net/ethernet/cisco/enic/vnic_enet.h
View File

@@ -21,6 +21,11 @@ struct vnic_enet_config {
u16 loop_tag;
u16 vf_rq_count;
u16 num_arfs;
u8 reserved[66];
u32 max_rq_ring; // MAX RQ ring size
u32 max_wq_ring; // MAX WQ ring size
u32 max_cq_ring; // MAX CQ ring size
u32 rdma_rsvd_lkey; // Reserved (privileged) LKey
};
#define VENETF_TSO 0x1 /* TSO enabled */

2
drivers/net/ethernet/cisco/enic/vnic_rq.h
View File

@@ -50,7 +50,7 @@ struct vnic_rq_ctrl {
(VNIC_RQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_rq_buf))
#define VNIC_RQ_BUF_BLKS_NEEDED(entries) \
DIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES(entries))
#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)
#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(16384)
struct vnic_rq_buf {
struct vnic_rq_buf *next;

2
drivers/net/ethernet/cisco/enic/vnic_wq.h
View File

@@ -62,7 +62,7 @@ struct vnic_wq_buf {
(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))
#define VNIC_WQ_BUF_BLKS_NEEDED(entries) \
DIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))
#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)
#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(16384)
struct vnic_wq {
unsigned int index;