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drm/xe/guc: Rename xe_guc_register_exec_queue

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This function is dedicated for use by the VFs, we shouldn't use
name that might suggests it's general purpose. While there, update
asserts to better reflect intended usage.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Satyanarayana K V P <satyanarayana.k.v.p@intel.com>
Link: https://lore.kernel.org/r/20250908123025.747-2-michal.wajdeczko@intel.com
This commit is contained in:
Michal Wajdeczko
2025-09-08 14:30:18 +02:00
parent 956f5e5bc8
commit dd432009f1
3 changed files with 11 additions and 10 deletions
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14
drivers/gpu/drm/xe/xe_guc_submit.c
View File

@@ -2528,7 +2528,7 @@ static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
}
/**
* xe_guc_register_exec_queue - Register exec queue for a given context type.
* xe_guc_register_vf_exec_queue - Register exec queue for a given context type.
* @q: Execution queue
* @ctx_type: Type of the context
*
@@ -2539,15 +2539,17 @@ static void guc_exec_queue_print(struct xe_exec_queue *q, struct drm_printer *p)
*
* Returns - None.
*/
void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type)
void xe_guc_register_vf_exec_queue(struct xe_exec_queue *q, int ctx_type)
{
struct xe_guc *guc = exec_queue_to_guc(q);
struct xe_device *xe = guc_to_xe(guc);
struct xe_gt *gt = guc_to_gt(guc);
xe_assert(xe, IS_SRIOV_VF(xe));
xe_assert(xe, !IS_DGFX(xe));
xe_assert(xe, (ctx_type > GUC_CONTEXT_NORMAL &&
ctx_type < GUC_CONTEXT_COUNT));
xe_gt_assert(gt, IS_SRIOV_VF(xe));
xe_gt_assert(gt, !IS_DGFX(xe));
xe_gt_assert(gt, ctx_type == GUC_CONTEXT_COMPRESSION_SAVE ||
ctx_type == GUC_CONTEXT_COMPRESSION_RESTORE);
xe_gt_assert(gt, GUC_SUBMIT_VER(guc) >= MAKE_GUC_VER(1, 23, 0));
register_exec_queue(q, ctx_type);
enable_scheduling(q);

2
drivers/gpu/drm/xe/xe_guc_submit.h
View File

@@ -46,7 +46,7 @@ xe_guc_exec_queue_snapshot_print(struct xe_guc_submit_exec_queue_snapshot *snaps
void
xe_guc_exec_queue_snapshot_free(struct xe_guc_submit_exec_queue_snapshot *snapshot);
void xe_guc_submit_print(struct xe_guc *guc, struct drm_printer *p);
void xe_guc_register_exec_queue(struct xe_exec_queue *q, int ctx_type);
void xe_guc_register_vf_exec_queue(struct xe_exec_queue *q, int ctx_type);
int xe_guc_contexts_hwsp_rebase(struct xe_guc *guc, void *scratch);

5
drivers/gpu/drm/xe/xe_sriov_vf_ccs.c
View File

@@ -186,7 +186,6 @@ static void ccs_rw_update_ring(struct xe_tile_vf_ccs *ctx)
static int register_save_restore_context(struct xe_tile_vf_ccs *ctx)
{
int err = -EINVAL;
int ctx_type;
switch (ctx->ctx_id) {
@@ -197,10 +196,10 @@ static int register_save_restore_context(struct xe_tile_vf_ccs *ctx)
ctx_type = GUC_CONTEXT_COMPRESSION_RESTORE;
break;
default:
return err;
return -EINVAL;
}
xe_guc_register_exec_queue(ctx->mig_q, ctx_type);
xe_guc_register_vf_exec_queue(ctx->mig_q, ctx_type);
return 0;
}