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net: dsa: mt7530: move pkt stats and err MIB counter to eth_mac stats API
Drop custom handling of TX/RX packet stats and error MIB counter and handle them in the standard .get_eth_mac_stats API The MIB entry are dropped from the custom MIB table and converted to a define providing only the MIB offset. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Link: https://patch.msgid.link/20250410163022.3695-5-ansuelsmth@gmail.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Christian Marangi
committed by
Paolo Abeni
Paolo Abeni
parent
e12989ab71
commit
dcf9eb6d33
@@ -34,24 +34,10 @@ static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)
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static const struct mt7530_mib_desc mt7530_mib[] = {
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MIB_DESC(1, 0x00, "TxDrop"),
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MIB_DESC(1, 0x04, "TxCrcErr"),
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MIB_DESC(1, 0x08, "TxUnicast"),
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MIB_DESC(1, 0x0c, "TxMulticast"),
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MIB_DESC(1, 0x10, "TxBroadcast"),
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MIB_DESC(1, 0x14, "TxCollision"),
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MIB_DESC(1, 0x18, "TxSingleCollision"),
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MIB_DESC(1, 0x1c, "TxMultipleCollision"),
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MIB_DESC(1, 0x20, "TxDeferred"),
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MIB_DESC(1, 0x24, "TxLateCollision"),
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MIB_DESC(1, 0x28, "TxExcessiveCollistion"),
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MIB_DESC(2, 0x48, "TxBytes"),
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MIB_DESC(1, 0x60, "RxDrop"),
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MIB_DESC(1, 0x64, "RxFiltering"),
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MIB_DESC(1, 0x68, "RxUnicast"),
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MIB_DESC(1, 0x6c, "RxMulticast"),
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MIB_DESC(1, 0x70, "RxBroadcast"),
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MIB_DESC(1, 0x74, "RxAlignErr"),
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MIB_DESC(1, 0x78, "RxCrcErr"),
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MIB_DESC(2, 0xa8, "RxBytes"),
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MIB_DESC(1, 0xb0, "RxCtrlDrop"),
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MIB_DESC(1, 0xb4, "RxIngressDrop"),
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MIB_DESC(1, 0xb8, "RxArlDrop"),
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@@ -811,6 +797,61 @@ mt7530_get_sset_count(struct dsa_switch *ds, int port, int sset)
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return ARRAY_SIZE(mt7530_mib);
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}
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static void mt7530_get_eth_mac_stats(struct dsa_switch *ds, int port,
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struct ethtool_eth_mac_stats *mac_stats)
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{
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struct mt7530_priv *priv = ds->priv;
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/* MIB counter doesn't provide a FramesTransmittedOK but instead
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* provide stats for Unicast, Broadcast and Multicast frames separately.
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* To simulate a global frame counter, read Unicast and addition Multicast
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* and Broadcast later
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*/
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_UNICAST, 1,
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&mac_stats->FramesTransmittedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_SINGLE_COLLISION, 1,
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&mac_stats->SingleCollisionFrames);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTIPLE_COLLISION, 1,
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&mac_stats->MultipleCollisionFrames);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_UNICAST, 1,
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&mac_stats->FramesReceivedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BYTES, 2,
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&mac_stats->OctetsTransmittedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_ALIGN_ERR, 1,
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&mac_stats->AlignmentErrors);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_DEFERRED, 1,
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&mac_stats->FramesWithDeferredXmissions);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_LATE_COLLISION, 1,
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&mac_stats->LateCollisions);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION, 1,
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&mac_stats->FramesAbortedDueToXSColls);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BYTES, 2,
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&mac_stats->OctetsReceivedOK);
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_MULTICAST, 1,
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&mac_stats->MulticastFramesXmittedOK);
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mac_stats->FramesTransmittedOK += mac_stats->MulticastFramesXmittedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_TX_BROADCAST, 1,
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&mac_stats->BroadcastFramesXmittedOK);
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mac_stats->FramesTransmittedOK += mac_stats->BroadcastFramesXmittedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_MULTICAST, 1,
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&mac_stats->MulticastFramesReceivedOK);
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mac_stats->FramesReceivedOK += mac_stats->MulticastFramesReceivedOK;
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mt7530_read_port_stats(priv, port, MT7530_PORT_MIB_RX_BROADCAST, 1,
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&mac_stats->BroadcastFramesReceivedOK);
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mac_stats->FramesReceivedOK += mac_stats->BroadcastFramesReceivedOK;
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}
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static const struct ethtool_rmon_hist_range mt7530_rmon_ranges[] = {
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{ 0, 64 },
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{ 65, 127 },
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@@ -3163,6 +3204,7 @@ const struct dsa_switch_ops mt7530_switch_ops = {
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.get_strings = mt7530_get_strings,
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.get_ethtool_stats = mt7530_get_ethtool_stats,
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.get_sset_count = mt7530_get_sset_count,
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.get_eth_mac_stats = mt7530_get_eth_mac_stats,
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.get_rmon_stats = mt7530_get_rmon_stats,
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.get_eth_ctrl_stats = mt7530_get_eth_ctrl_stats,
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.set_ageing_time = mt7530_set_ageing_time,
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@@ -424,6 +424,14 @@ enum mt7530_vlan_port_acc_frm {
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/* Register for MIB */
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#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
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/* Each define is an offset of MT7530_PORT_MIB_COUNTER */
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#define MT7530_PORT_MIB_TX_UNICAST 0x08
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#define MT7530_PORT_MIB_TX_MULTICAST 0x0c
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#define MT7530_PORT_MIB_TX_BROADCAST 0x10
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#define MT7530_PORT_MIB_TX_SINGLE_COLLISION 0x18
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#define MT7530_PORT_MIB_TX_MULTIPLE_COLLISION 0x1c
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#define MT7530_PORT_MIB_TX_DEFERRED 0x20
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#define MT7530_PORT_MIB_TX_LATE_COLLISION 0x24
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#define MT7530_PORT_MIB_TX_EXCESSIVE_COLLISION 0x28
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#define MT7530_PORT_MIB_TX_PAUSE 0x2c
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#define MT7530_PORT_MIB_TX_PKT_SZ_64 0x30
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#define MT7530_PORT_MIB_TX_PKT_SZ_65_TO_127 0x34
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@@ -431,6 +439,11 @@ enum mt7530_vlan_port_acc_frm {
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#define MT7530_PORT_MIB_TX_PKT_SZ_256_TO_511 0x3c
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#define MT7530_PORT_MIB_TX_PKT_SZ_512_TO_1023 0x40
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#define MT7530_PORT_MIB_TX_PKT_SZ_1024_TO_MAX 0x44
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#define MT7530_PORT_MIB_TX_BYTES 0x48 /* 64 bytes */
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#define MT7530_PORT_MIB_RX_UNICAST 0x68
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#define MT7530_PORT_MIB_RX_MULTICAST 0x6c
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#define MT7530_PORT_MIB_RX_BROADCAST 0x70
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#define MT7530_PORT_MIB_RX_ALIGN_ERR 0x74
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#define MT7530_PORT_MIB_RX_UNDER_SIZE_ERR 0x7c
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#define MT7530_PORT_MIB_RX_FRAG_ERR 0x80
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#define MT7530_PORT_MIB_RX_OVER_SZ_ERR 0x84
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@@ -442,6 +455,7 @@ enum mt7530_vlan_port_acc_frm {
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#define MT7530_PORT_MIB_RX_PKT_SZ_256_TO_511 0x9c
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#define MT7530_PORT_MIB_RX_PKT_SZ_512_TO_1023 0xa0
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#define MT7530_PORT_MIB_RX_PKT_SZ_1024_TO_MAX 0xa4
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#define MT7530_PORT_MIB_RX_BYTES 0xa8 /* 64 bytes */
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#define MT7530_MIB_CCR 0x4fe0
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#define CCR_MIB_ENABLE BIT(31)
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#define CCR_RX_OCT_CNT_GOOD BIT(7)
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