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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-12-27 11:06:41 -05:00
Merge tag 'ntb-6.18' of https://github.com/jonmason/ntb
Pull NTB updates from Jon Mason: - Add support for Renesas R-Car and allow arbitrary BAR mapping in EPF - Update ntb_hw_amd to support the latest generation secondary topology and add a new maintainer - Fix a bug by adding a mutex to ensure `link_event_callback` executes sequentially * tag 'ntb-6.18' of https://github.com/jonmason/ntb: NTB: epf: Add Renesas rcar support NTB: epf: Allow arbitrary BAR mapping ntb: Add mutex to make link_event_callback executed linearly. MAINTAINERS: Update for the NTB AMD driver maintainer ntb_hw_amd: Update amd_ntb_get_link_status to support latest generation secondary topology
This commit is contained in:
@@ -18338,6 +18338,7 @@ F: Documentation/core-api/symbol-namespaces.rst
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F: scripts/nsdeps
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NTB AMD DRIVER
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M: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
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M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
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L: ntb@lists.linux.dev
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S: Supported
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@@ -197,13 +197,22 @@ static int amd_ntb_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
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static int amd_ntb_get_link_status(struct amd_ntb_dev *ndev)
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{
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struct pci_dev *pdev = NULL;
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struct pci_dev *pdev = ndev->ntb.pdev;
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struct pci_dev *pci_swds = NULL;
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struct pci_dev *pci_swus = NULL;
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u32 stat;
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int rc;
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if (ndev->ntb.topo == NTB_TOPO_SEC) {
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if (ndev->dev_data->is_endpoint) {
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rc = pcie_capability_read_dword(pdev, PCI_EXP_LNKCTL, &stat);
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if (rc)
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return rc;
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ndev->lnk_sta = stat;
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return 0;
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}
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/* Locate the pointer to Downstream Switch for this device */
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pci_swds = pci_upstream_bridge(ndev->ntb.pdev);
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if (pci_swds) {
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@@ -1311,6 +1320,11 @@ static const struct ntb_dev_data dev_data[] = {
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.mw_count = 2,
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.mw_idx = 2,
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},
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{ /* for device 0x17d7 */
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.mw_count = 2,
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.mw_idx = 2,
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.is_endpoint = true,
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},
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};
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static const struct pci_device_id amd_ntb_pci_tbl[] = {
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@@ -1319,6 +1333,8 @@ static const struct pci_device_id amd_ntb_pci_tbl[] = {
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{ PCI_VDEVICE(AMD, 0x14c0), (kernel_ulong_t)&dev_data[1] },
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{ PCI_VDEVICE(AMD, 0x14c3), (kernel_ulong_t)&dev_data[1] },
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{ PCI_VDEVICE(AMD, 0x155a), (kernel_ulong_t)&dev_data[1] },
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{ PCI_VDEVICE(AMD, 0x17d4), (kernel_ulong_t)&dev_data[1] },
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{ PCI_VDEVICE(AMD, 0x17d7), (kernel_ulong_t)&dev_data[2] },
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{ PCI_VDEVICE(HYGON, 0x145b), (kernel_ulong_t)&dev_data[0] },
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{ 0, }
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};
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@@ -168,6 +168,7 @@ enum {
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struct ntb_dev_data {
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const unsigned char mw_count;
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const unsigned int mw_idx;
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const bool is_endpoint;
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};
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struct amd_ntb_dev;
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@@ -49,6 +49,7 @@
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#define NTB_EPF_COMMAND_TIMEOUT 1000 /* 1 Sec */
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enum pci_barno {
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NO_BAR = -1,
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BAR_0,
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BAR_1,
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BAR_2,
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@@ -57,16 +58,26 @@ enum pci_barno {
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BAR_5,
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};
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enum epf_ntb_bar {
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BAR_CONFIG,
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BAR_PEER_SPAD,
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BAR_DB,
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BAR_MW1,
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BAR_MW2,
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BAR_MW3,
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BAR_MW4,
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NTB_BAR_NUM,
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};
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#define NTB_EPF_MAX_MW_COUNT (NTB_BAR_NUM - BAR_MW1)
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struct ntb_epf_dev {
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struct ntb_dev ntb;
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struct device *dev;
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/* Mutex to protect providing commands to NTB EPF */
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struct mutex cmd_lock;
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enum pci_barno ctrl_reg_bar;
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enum pci_barno peer_spad_reg_bar;
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enum pci_barno db_reg_bar;
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enum pci_barno mw_bar;
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const enum pci_barno *barno_map;
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unsigned int mw_count;
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unsigned int spad_count;
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@@ -85,17 +96,6 @@ struct ntb_epf_dev {
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#define ntb_ndev(__ntb) container_of(__ntb, struct ntb_epf_dev, ntb)
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struct ntb_epf_data {
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/* BAR that contains both control region and self spad region */
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enum pci_barno ctrl_reg_bar;
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/* BAR that contains peer spad region */
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enum pci_barno peer_spad_reg_bar;
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/* BAR that contains Doorbell region and Memory window '1' */
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enum pci_barno db_reg_bar;
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/* BAR that contains memory windows*/
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enum pci_barno mw_bar;
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};
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static int ntb_epf_send_command(struct ntb_epf_dev *ndev, u32 command,
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u32 argument)
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{
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@@ -144,7 +144,7 @@ static int ntb_epf_mw_to_bar(struct ntb_epf_dev *ndev, int idx)
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return -EINVAL;
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}
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return idx + 2;
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return ndev->barno_map[BAR_MW1 + idx];
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}
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static int ntb_epf_mw_count(struct ntb_dev *ntb, int pidx)
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@@ -413,7 +413,9 @@ static int ntb_epf_mw_set_trans(struct ntb_dev *ntb, int pidx, int idx,
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return -EINVAL;
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}
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bar = idx + ndev->mw_bar;
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bar = ntb_epf_mw_to_bar(ndev, idx);
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if (bar < 0)
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return bar;
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mw_size = pci_resource_len(ntb->pdev, bar);
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@@ -455,7 +457,9 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,
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if (idx == 0)
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offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);
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bar = idx + ndev->mw_bar;
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bar = ntb_epf_mw_to_bar(ndev, idx);
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if (bar < 0)
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return bar;
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if (base)
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*base = pci_resource_start(ndev->ntb.pdev, bar) + offset;
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@@ -560,6 +564,11 @@ static int ntb_epf_init_dev(struct ntb_epf_dev *ndev)
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ndev->mw_count = readl(ndev->ctrl_reg + NTB_EPF_MW_COUNT);
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ndev->spad_count = readl(ndev->ctrl_reg + NTB_EPF_SPAD_COUNT);
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if (ndev->mw_count > NTB_EPF_MAX_MW_COUNT) {
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dev_err(dev, "Unsupported MW count: %u\n", ndev->mw_count);
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return -EINVAL;
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}
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return 0;
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}
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@@ -596,14 +605,15 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev,
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dev_warn(&pdev->dev, "Cannot DMA highmem\n");
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}
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ndev->ctrl_reg = pci_iomap(pdev, ndev->ctrl_reg_bar, 0);
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ndev->ctrl_reg = pci_iomap(pdev, ndev->barno_map[BAR_CONFIG], 0);
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if (!ndev->ctrl_reg) {
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ret = -EIO;
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goto err_pci_regions;
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}
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if (ndev->peer_spad_reg_bar) {
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ndev->peer_spad_reg = pci_iomap(pdev, ndev->peer_spad_reg_bar, 0);
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if (ndev->barno_map[BAR_PEER_SPAD] != ndev->barno_map[BAR_CONFIG]) {
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ndev->peer_spad_reg = pci_iomap(pdev,
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ndev->barno_map[BAR_PEER_SPAD], 0);
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if (!ndev->peer_spad_reg) {
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ret = -EIO;
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goto err_pci_regions;
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@@ -614,7 +624,7 @@ static int ntb_epf_init_pci(struct ntb_epf_dev *ndev,
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ndev->peer_spad_reg = ndev->ctrl_reg + spad_off + spad_sz;
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}
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ndev->db_reg = pci_iomap(pdev, ndev->db_reg_bar, 0);
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ndev->db_reg = pci_iomap(pdev, ndev->barno_map[BAR_DB], 0);
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if (!ndev->db_reg) {
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ret = -EIO;
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goto err_pci_regions;
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@@ -659,12 +669,7 @@ static void ntb_epf_cleanup_isr(struct ntb_epf_dev *ndev)
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static int ntb_epf_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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enum pci_barno peer_spad_reg_bar = BAR_1;
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enum pci_barno ctrl_reg_bar = BAR_0;
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enum pci_barno db_reg_bar = BAR_2;
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enum pci_barno mw_bar = BAR_2;
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struct device *dev = &pdev->dev;
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struct ntb_epf_data *data;
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struct ntb_epf_dev *ndev;
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int ret;
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@@ -675,18 +680,10 @@ static int ntb_epf_pci_probe(struct pci_dev *pdev,
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if (!ndev)
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return -ENOMEM;
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data = (struct ntb_epf_data *)id->driver_data;
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if (data) {
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peer_spad_reg_bar = data->peer_spad_reg_bar;
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ctrl_reg_bar = data->ctrl_reg_bar;
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db_reg_bar = data->db_reg_bar;
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mw_bar = data->mw_bar;
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}
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ndev->barno_map = (const enum pci_barno *)id->driver_data;
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if (!ndev->barno_map)
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return -EINVAL;
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ndev->peer_spad_reg_bar = peer_spad_reg_bar;
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ndev->ctrl_reg_bar = ctrl_reg_bar;
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ndev->db_reg_bar = db_reg_bar;
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ndev->mw_bar = mw_bar;
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ndev->dev = dev;
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ntb_epf_init_struct(ndev, pdev);
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@@ -730,30 +727,51 @@ static void ntb_epf_pci_remove(struct pci_dev *pdev)
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ntb_epf_deinit_pci(ndev);
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}
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static const struct ntb_epf_data j721e_data = {
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.ctrl_reg_bar = BAR_0,
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.peer_spad_reg_bar = BAR_1,
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.db_reg_bar = BAR_2,
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.mw_bar = BAR_2,
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static const enum pci_barno j721e_map[NTB_BAR_NUM] = {
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[BAR_CONFIG] = BAR_0,
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[BAR_PEER_SPAD] = BAR_1,
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[BAR_DB] = BAR_2,
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[BAR_MW1] = BAR_2,
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[BAR_MW2] = BAR_3,
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[BAR_MW3] = BAR_4,
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[BAR_MW4] = BAR_5
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};
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static const struct ntb_epf_data mx8_data = {
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.ctrl_reg_bar = BAR_0,
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.peer_spad_reg_bar = BAR_0,
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.db_reg_bar = BAR_2,
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.mw_bar = BAR_4,
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static const enum pci_barno mx8_map[NTB_BAR_NUM] = {
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[BAR_CONFIG] = BAR_0,
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[BAR_PEER_SPAD] = BAR_0,
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[BAR_DB] = BAR_2,
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[BAR_MW1] = BAR_4,
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[BAR_MW2] = BAR_5,
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[BAR_MW3] = NO_BAR,
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[BAR_MW4] = NO_BAR
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};
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static const enum pci_barno rcar_barno[NTB_BAR_NUM] = {
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[BAR_CONFIG] = BAR_0,
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[BAR_PEER_SPAD] = BAR_0,
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[BAR_DB] = BAR_4,
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[BAR_MW1] = BAR_2,
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[BAR_MW2] = NO_BAR,
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[BAR_MW3] = NO_BAR,
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[BAR_MW4] = NO_BAR,
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};
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static const struct pci_device_id ntb_epf_pci_tbl[] = {
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{
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PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
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.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
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.driver_data = (kernel_ulong_t)&j721e_data,
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.driver_data = (kernel_ulong_t)j721e_map,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x0809),
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.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
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.driver_data = (kernel_ulong_t)&mx8_data,
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.driver_data = (kernel_ulong_t)mx8_map,
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},
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{
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PCI_DEVICE(PCI_VENDOR_ID_RENESAS, 0x0030),
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.class = PCI_CLASS_MEMORY_RAM << 8, .class_mask = 0xffff00,
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.driver_data = (kernel_ulong_t)rcar_barno,
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},
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{ },
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};
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@@ -59,6 +59,7 @@
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/uaccess.h>
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#include <linux/mutex.h>
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#include "linux/ntb.h"
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#include "linux/ntb_transport.h"
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@@ -241,6 +242,9 @@ struct ntb_transport_ctx {
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struct work_struct link_cleanup;
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struct dentry *debugfs_node_dir;
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/* Make sure workq of link event be executed serially */
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struct mutex link_event_lock;
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};
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enum {
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@@ -1024,6 +1028,7 @@ static void ntb_transport_link_cleanup_work(struct work_struct *work)
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struct ntb_transport_ctx *nt =
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container_of(work, struct ntb_transport_ctx, link_cleanup);
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guard(mutex)(&nt->link_event_lock);
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ntb_transport_link_cleanup(nt);
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}
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@@ -1047,6 +1052,8 @@ static void ntb_transport_link_work(struct work_struct *work)
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u32 val;
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int rc = 0, i, spad;
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guard(mutex)(&nt->link_event_lock);
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/* send the local info, in the opposite order of the way we read it */
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if (nt->use_msi) {
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