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hwmon: (pmbus) export pmbus_wait and pmbus_update_ts

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Export pmbus_wait() and pmbus_update_ts() so that PMBus device
drivers which perform raw I2C transfers outside the core helpers
can keep the PMBus core delay bookkeeping in sync.

Move PMBUS_OP_WRITE and PMBUS_OP_PAGE_CHANGE from pmbus_core.c to
pmbus.h so device drivers can pass the correct operation type flags
to pmbus_update_ts().

This is needed by the max31785 driver, which performs raw
i2c_transfer() calls for its 4-byte extended fan speed reads that
cannot use the standard PMBus word read path.

Signed-off-by: Sanman Pradhan <psanman@juniper.net>
Link: https://lore.kernel.org/r/20260321181052.27129-2-sanman.pradhan@hpe.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
This commit is contained in:
Sanman Pradhan
2026-03-21 18:11:30 +00:00
committed by Guenter Roeck
parent 709cc8ff1b
commit dc4acb718e
2 changed files with 11 additions and 4 deletions
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6
drivers/hwmon/pmbus/pmbus.h
View File

@@ -424,6 +424,10 @@ enum vrm_version { vr11 = 0, vr12, vr13, imvp9, amd625mv, nvidia195mv };
#define PMBUS_REV_12 0x22 /* PMBus revision 1.2 */
#define PMBUS_REV_13 0x33 /* PMBus revision 1.3 */
/* Operation type flags for pmbus_update_ts */
#define PMBUS_OP_WRITE BIT(0)
#define PMBUS_OP_PAGE_CHANGE BIT(1)
struct pmbus_driver_info {
int pages; /* Total number of pages */
u8 phases[PMBUS_PAGES]; /* Number of phases per page */
@@ -541,6 +545,8 @@ int pmbus_regulator_init_cb(struct regulator_dev *rdev,
void pmbus_clear_cache(struct i2c_client *client);
void pmbus_set_update(struct i2c_client *client, u8 reg, bool update);
void pmbus_wait(struct i2c_client *client);
void pmbus_update_ts(struct i2c_client *client, int op);
int pmbus_set_page(struct i2c_client *client, int page, int phase);
int pmbus_read_word_data(struct i2c_client *client, int page, int phase,
u8 reg);

9
drivers/hwmon/pmbus/pmbus_core.c
View File

@@ -37,8 +37,7 @@
* The type of operation used for picking the delay between
* successive pmbus operations.
*/
#define PMBUS_OP_WRITE BIT(0)
#define PMBUS_OP_PAGE_CHANGE BIT(1)
/* PMBUS_OP_WRITE and PMBUS_OP_PAGE_CHANGE are defined in pmbus.h */
static int wp = -1;
module_param(wp, int, 0444);
@@ -179,7 +178,7 @@ void pmbus_set_update(struct i2c_client *client, u8 reg, bool update)
EXPORT_SYMBOL_NS_GPL(pmbus_set_update, "PMBUS");
/* Some chips need a delay between accesses. */
static void pmbus_wait(struct i2c_client *client)
void pmbus_wait(struct i2c_client *client)
{
struct pmbus_data *data = i2c_get_clientdata(client);
s64 delay = ktime_us_delta(data->next_access_backoff, ktime_get());
@@ -187,9 +186,10 @@ static void pmbus_wait(struct i2c_client *client)
if (delay > 0)
fsleep(delay);
}
EXPORT_SYMBOL_NS_GPL(pmbus_wait, "PMBUS");
/* Sets the last operation timestamp for pmbus_wait */
static void pmbus_update_ts(struct i2c_client *client, int op)
void pmbus_update_ts(struct i2c_client *client, int op)
{
struct pmbus_data *data = i2c_get_clientdata(client);
const struct pmbus_driver_info *info = data->info;
@@ -203,6 +203,7 @@ static void pmbus_update_ts(struct i2c_client *client, int op)
if (delay > 0)
data->next_access_backoff = ktime_add_us(ktime_get(), delay);
}
EXPORT_SYMBOL_NS_GPL(pmbus_update_ts, "PMBUS");
int pmbus_set_page(struct i2c_client *client, int page, int phase)
{