mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-04 09:21:34 -04:00
Code Issues Packages Projects Releases Wiki Activity

drm/i915/display/dsc: Force dsc BPP

Browse Source 
Set DSC BPP to the value forced through
debugfs. It can go from bpc to bpp-1.

v2: Use default dsc bpp when we are just
    doing force_dsc_en, use default dsc bpp
    for invalid force_dsc_bpp values. (Jani)

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Swati Sharma <swati2.sharma@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210720064907.9771-4-vandita.kulkarni@intel.com
This commit is contained in:
Vandita Kulkarni
2021-07-20 12:19:07 +05:30
parent da3829ef99
commit dc22aa1305
1 changed files with 17 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/gpu/drm/i915/display/intel_dp.c
View File

@@ -1274,6 +1274,23 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
pipe_config->pipe_bpp);
pipe_config->dsc.slice_count = dsc_dp_slice_count;
}
/* As of today we support DSC for only RGB */
if (intel_dp->force_dsc_bpp) {
if (intel_dp->force_dsc_bpp >= 8 &&
intel_dp->force_dsc_bpp < pipe_bpp) {
drm_dbg_kms(&dev_priv->drm,
"DSC BPP forced to %d",
intel_dp->force_dsc_bpp);
pipe_config->dsc.compressed_bpp =
intel_dp->force_dsc_bpp;
} else {
drm_dbg_kms(&dev_priv->drm,
"Invalid DSC BPP %d",
intel_dp->force_dsc_bpp);
}
}
/*
* VDSC engine operates at 1 Pixel per clock, so if peak pixel rate
* is greater than the maximum Cdclock and if slice count is even