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Merge tag 'x86_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Borislav Petkov: - Remove dead code leftovers after a recent mitigations cleanup which fail a Clang build - Make sure a Retbleed mitigation message is printed only when necessary - Correct the last Zen1 microcode revision for which Entrysign sha256 check is needed - Fix a NULL ptr deref when mounting the resctrl fs on a system which supports assignable counters but where L3 total and local bandwidth monitoring has been disabled at boot * tag 'x86_urgent_for_v6.18_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/bugs: Remove dead code which might prevent from building x86/bugs: Qualify RETBLEED_INTEL_MSG x86/microcode: Fix Entrysign revision check for Zen1/Naples x86,fs/resctrl: Fix NULL pointer dereference with events force-disabled in mbm_event mode
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@@ -1463,7 +1463,9 @@ static void __init retbleed_update_mitigation(void)
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break;
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default:
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if (retbleed_mitigation != RETBLEED_MITIGATION_STUFF) {
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pr_err(RETBLEED_INTEL_MSG);
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if (retbleed_mitigation != RETBLEED_MITIGATION_NONE)
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pr_err(RETBLEED_INTEL_MSG);
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retbleed_mitigation = RETBLEED_MITIGATION_NONE;
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}
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}
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@@ -1825,13 +1827,6 @@ void unpriv_ebpf_notify(int new_state)
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}
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#endif
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static inline bool match_option(const char *arg, int arglen, const char *opt)
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{
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int len = strlen(opt);
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return len == arglen && !strncmp(arg, opt, len);
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}
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/* The kernel command line selection for spectre v2 */
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enum spectre_v2_mitigation_cmd {
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SPECTRE_V2_CMD_NONE,
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@@ -194,7 +194,7 @@ static bool need_sha_check(u32 cur_rev)
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}
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switch (cur_rev >> 8) {
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case 0x80012: return cur_rev <= 0x800126f; break;
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case 0x80012: return cur_rev <= 0x8001277; break;
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case 0x80082: return cur_rev <= 0x800820f; break;
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case 0x83010: return cur_rev <= 0x830107c; break;
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case 0x86001: return cur_rev <= 0x860010e; break;
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@@ -458,7 +458,16 @@ int __init rdt_get_mon_l3_config(struct rdt_resource *r)
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r->mon.mbm_cfg_mask = ecx & MAX_EVT_CONFIG_BITS;
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}
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if (rdt_cpu_has(X86_FEATURE_ABMC)) {
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/*
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* resctrl assumes a system that supports assignable counters can
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* switch to "default" mode. Ensure that there is a "default" mode
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* to switch to. This enforces a dependency between the independent
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* X86_FEATURE_ABMC and X86_FEATURE_CQM_MBM_TOTAL/X86_FEATURE_CQM_MBM_LOCAL
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* hardware features.
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*/
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if (rdt_cpu_has(X86_FEATURE_ABMC) &&
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(rdt_cpu_has(X86_FEATURE_CQM_MBM_TOTAL) ||
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rdt_cpu_has(X86_FEATURE_CQM_MBM_LOCAL))) {
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r->mon.mbm_cntr_assignable = true;
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cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx);
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r->mon.num_mbm_cntrs = (ebx & GENMASK(15, 0)) + 1;
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@@ -1782,15 +1782,13 @@ int resctrl_mon_resource_init(void)
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mba_mbps_default_event = QOS_L3_MBM_TOTAL_EVENT_ID;
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if (r->mon.mbm_cntr_assignable) {
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if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID))
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resctrl_enable_mon_event(QOS_L3_MBM_TOTAL_EVENT_ID);
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if (!resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID))
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resctrl_enable_mon_event(QOS_L3_MBM_LOCAL_EVENT_ID);
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mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask;
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mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask &
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(READS_TO_LOCAL_MEM |
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READS_TO_LOCAL_S_MEM |
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NON_TEMP_WRITE_TO_LOCAL_MEM);
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if (resctrl_is_mon_event_enabled(QOS_L3_MBM_TOTAL_EVENT_ID))
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mon_event_all[QOS_L3_MBM_TOTAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask;
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if (resctrl_is_mon_event_enabled(QOS_L3_MBM_LOCAL_EVENT_ID))
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mon_event_all[QOS_L3_MBM_LOCAL_EVENT_ID].evt_cfg = r->mon.mbm_cfg_mask &
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(READS_TO_LOCAL_MEM |
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READS_TO_LOCAL_S_MEM |
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NON_TEMP_WRITE_TO_LOCAL_MEM);
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r->mon.mbm_assign_on_mkdir = true;
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resctrl_file_fflags_init("num_mbm_cntrs",
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RFTYPE_MON_INFO | RFTYPE_RES_CACHE);
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