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arm64: dts: renesas: r8a77970: eagle/v3msk: Add QSPI flash support
Define the Eagle/V3MSK board dependent parts of the RPC-IF device node. Add device nodes for Spansion S25FS512S SPI flash and MTD partitions on it. Based on the original patches by Dmitry Shifrin. Signed-off-by: Dmitry Shifrin <dmitry.shifrin@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Link: https://lore.kernel.org/r/fca1d012-29bf-eead-1c0d-4dd837c0bc68@cogentembedded.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
committed by
Geert Uytterhoeven
parent
11a6a6a50b
commit
daa36ae015
@@ -187,12 +187,79 @@ i2c0_pins: i2c0 {
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function = "i2c0";
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};
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qspi0_pins: qspi0 {
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groups = "qspi0_ctrl", "qspi0_data4";
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function = "qspi0";
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};
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scif0_pins: scif0 {
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groups = "scif0_data";
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function = "scif0";
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};
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};
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&rpc {
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pinctrl-0 = <&qspi0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "spansion,s25fs512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bootparam@0 {
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reg = <0x00000000 0x040000>;
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read-only;
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};
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cr7@40000 {
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reg = <0x00040000 0x080000>;
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read-only;
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};
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cert_header_sa3@c0000 {
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reg = <0x000c0000 0x080000>;
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read-only;
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};
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bl2@140000 {
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reg = <0x00140000 0x040000>;
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read-only;
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};
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cert_header_sa6@180000 {
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reg = <0x00180000 0x040000>;
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read-only;
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};
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bl31@1c0000 {
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reg = <0x001c0000 0x460000>;
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read-only;
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};
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uboot@640000 {
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reg = <0x00640000 0x0c0000>;
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read-only;
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};
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uboot-env@700000 {
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reg = <0x00700000 0x040000>;
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read-only;
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};
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dtb@740000 {
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reg = <0x00740000 0x080000>;
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};
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kernel@7c0000 {
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reg = <0x007c0000 0x1400000>;
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};
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user@1bc0000 {
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reg = <0x01bc0000 0x2440000>;
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};
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};
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};
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};
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&rwdt {
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timeout-sec = <60>;
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status = "okay";
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@@ -212,12 +212,79 @@ mmc_pins: mmc_3_3v {
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power-source = <3300>;
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};
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qspi0_pins: qspi0 {
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groups = "qspi0_ctrl", "qspi0_data4";
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function = "qspi0";
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};
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scif0_pins: scif0 {
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groups = "scif0_data";
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function = "scif0";
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};
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};
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&rpc {
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pinctrl-0 = <&qspi0_pins>;
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pinctrl-names = "default";
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status = "okay";
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flash@0 {
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compatible = "spansion,s25fs512s", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bootparam@0 {
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reg = <0x00000000 0x040000>;
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read-only;
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};
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cr7@40000 {
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reg = <0x00040000 0x080000>;
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read-only;
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};
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cert_header_sa3@c0000 {
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reg = <0x000c0000 0x080000>;
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read-only;
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};
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bl2@140000 {
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reg = <0x00140000 0x040000>;
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read-only;
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};
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cert_header_sa6@180000 {
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reg = <0x00180000 0x040000>;
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read-only;
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};
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bl31@1c0000 {
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reg = <0x001c0000 0x460000>;
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read-only;
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};
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uboot@640000 {
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reg = <0x00640000 0x0c0000>;
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read-only;
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};
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uboot-env@700000 {
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reg = <0x00700000 0x040000>;
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read-only;
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};
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dtb@740000 {
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reg = <0x00740000 0x080000>;
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};
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kernel@7c0000 {
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reg = <0x007c0000 0x1400000>;
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};
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user@1bc0000 {
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reg = <0x01bc0000 0x2440000>;
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};
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};
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};
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};
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&scif0 {
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pinctrl-0 = <&scif0_pins>;
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pinctrl-names = "default";
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