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Documentation/x86/topology: Detail CPUID leaves used for topology enumeration
Add a new section describing the different CPUID leaves and fields used to parse topology on x86 systems. [ bp: Cleanups and simplifications ontop. ] Suggested-by: Borislav Petkov <bp@alien8.de> Signed-off-by: K Prateek Nayak <kprateek.nayak@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://lore.kernel.org/20250901170418.4314-1-kprateek.nayak@amd.com
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Ingo Molnar
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@@ -141,6 +141,197 @@ Thread-related topology information in the kernel:
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System topology enumeration
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===========================
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The topology on x86 systems can be discovered using a combination of vendor
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specific CPUID leaves which enumerate the processor topology and the cache
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hierarchy.
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The CPUID leaves in their preferred order of parsing for each x86 vendor is as
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follows:
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1) AMD
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1) CPUID leaf 0x80000026 [Extended CPU Topology] (Core::X86::Cpuid::ExCpuTopology)
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The extended CPUID leaf 0x80000026 is the extension of the CPUID leaf 0xB
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and provides the topology information of Core, Complex, CCD (Die), and
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Socket in each level.
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Support for the leaf is discovered by checking if the maximum extended
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CPUID level is >= 0x80000026 and then checking if `LogProcAtThisLevel`
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in `EBX[15:0]` at a particular level (starting from 0) is non-zero.
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The `LevelType` in `ECX[15:8]` at the level provides the topology domain
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the level describes - Core, Complex, CCD(Die), or the Socket.
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The kernel uses the `CoreMaskWidth` from `EAX[4:0]` to discover the
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number of bits that need to be right-shifted from `ExtendedLocalApicId`
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in `EDX[31:0]` in order to get a unique Topology ID for the topology
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level. CPUs with the same Topology ID share the resources at that level.
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CPUID leaf 0x80000026 also provides more information regarding the power
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and efficiency rankings, and about the core type on AMD processors with
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heterogeneous characteristics.
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If CPUID leaf 0x80000026 is supported, further parsing is not required.
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2) CPUID leaf 0x0000000B [Extended Topology Enumeration] (Core::X86::Cpuid::ExtTopEnum)
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The extended CPUID leaf 0x0000000B is the predecessor on the extended
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CPUID leaf 0x80000026 and only describes the core, and the socket domains
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of the processor topology.
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The support for the leaf is discovered by checking if the maximum supported
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CPUID level is >= 0xB and then if `EBX[31:0]` at a particular level
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(starting from 0) is non-zero.
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The `LevelType` in `ECX[15:8]` at the level provides the topology domain
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that the level describes - Thread, or Processor (Socket).
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The kernel uses the `CoreMaskWidth` from `EAX[4:0]` to discover the
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number of bits that need to be right-shifted from the `ExtendedLocalApicId`
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in `EDX[31:0]` to get a unique Topology ID for that topology level. CPUs
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sharing the Topology ID share the resources at that level.
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If CPUID leaf 0xB is supported, further parsing is not required.
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3) CPUID leaf 0x80000008 ECX [Size Identifiers] (Core::X86::Cpuid::SizeId)
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If neither the CPUID leaf 0x80000026 nor 0xB is supported, the number of
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CPUs on the package is detected using the Size Identifier leaf
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0x80000008 ECX.
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The support for the leaf is discovered by checking if the supported
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extended CPUID level is >= 0x80000008.
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The shifts from the APIC ID for the Socket ID is calculated from the
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`ApicIdSize` field in `ECX[15:12]` if it is non-zero.
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If `ApicIdSize` is reported to be zero, the shift is calculated as the
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order of the `number of threads` calculated from `NC` field in
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`ECX[7:0]` which describes the `number of threads - 1` on the package.
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Unless Extended APIC ID is supported, the APIC ID used to find the
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Socket ID is from the `LocalApicId` field of CPUID leaf 0x00000001
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`EBX[31:24]`.
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The topology parsing continues to detect if Extended APIC ID is
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supported or not.
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4) CPUID leaf 0x8000001E [Extended APIC ID, Core Identifiers, Node Identifiers]
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(Core::X86::Cpuid::{ExtApicId,CoreId,NodeId})
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The support for Extended APIC ID can be detected by checking for the
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presence of `TopologyExtensions` in `ECX[22]` of CPUID leaf 0x80000001
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[Feature Identifiers] (Core::X86::Cpuid::FeatureExtIdEcx).
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If Topology Extensions is supported, the APIC ID from `ExtendedApicId`
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from CPUID leaf 0x8000001E `EAX[31:0]` should be preferred over that from
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`LocalApicId` field of CPUID leaf 0x00000001 `EBX[31:24]` for topology
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enumeration.
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On processors of Family 0x17 and above that do not support CPUID leaf
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0x80000026 or CPUID leaf 0xB, the shifts from the APIC ID for the Core
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ID is calculated using the order of `number of threads per core`
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calculated using the `ThreadsPerCore` field in `EBX[15:8]` which
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describes `number of threads per core - 1`.
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On Processors of Family 0x15, the Core ID from `EBX[7:0]` is used as the
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`cu_id` (Compute Unit ID) to detect CPUs that share the compute units.
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All AMD processors that support the `TopologyExtensions` feature store the
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`NodeId` from the `ECX[7:0]` of CPUID leaf 0x8000001E
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(Core::X86::Cpuid::NodeId) as the per-CPU `node_id`. On older processors,
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the `node_id` was discovered using MSR_FAM10H_NODE_ID MSR (MSR
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0x0xc001_100c). The presence of the NODE_ID MSR was detected by checking
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`ECX[19]` of CPUID leaf 0x80000001 [Feature Identifiers]
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(Core::X86::Cpuid::FeatureExtIdEcx).
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2) Intel
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On Intel platforms, the CPUID leaves that enumerate the processor
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topology are as follows:
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1) CPUID leaf 0x1F (V2 Extended Topology Enumeration Leaf)
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The CPUID leaf 0x1F is the extension of the CPUID leaf 0xB and provides
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the topology information of Core, Module, Tile, Die, DieGrp, and Socket
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in each level.
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The support for the leaf is discovered by checking if the supported
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CPUID level is >= 0x1F and then `EBX[31:0]` at a particular level
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(starting from 0) is non-zero.
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The `Domain Type` in `ECX[15:8]` of the sub-leaf provides the topology
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domain that the level describes - Core, Module, Tile, Die, DieGrp, and
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Socket.
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The kernel uses the value from `EAX[4:0]` to discover the number of
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bits that need to be right shifted from the `x2APIC ID` in `EDX[31:0]`
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to get a unique Topology ID for the topology level. CPUs with the same
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Topology ID share the resources at that level.
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If CPUID leaf 0x1F is supported, further parsing is not required.
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2) CPUID leaf 0x0000000B (Extended Topology Enumeration Leaf)
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The extended CPUID leaf 0x0000000B is the predecessor of the V2 Extended
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Topology Enumeration Leaf 0x1F and only describes the core, and the
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socket domains of the processor topology.
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The support for the leaf is iscovered by checking if the supported CPUID
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level is >= 0xB and then checking if `EBX[31:0]` at a particular level
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(starting from 0) is non-zero.
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CPUID leaf 0x0000000B shares the same layout as CPUID leaf 0x1F and
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should be enumerated in a similar manner.
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If CPUID leaf 0xB is supported, further parsing is not required.
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3) CPUID leaf 0x00000004 (Deterministic Cache Parameters Leaf)
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On Intel processors that support neither CPUID leaf 0x1F, nor CPUID leaf
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0xB, the shifts for the SMT domains is calculated using the number of
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CPUs sharing the L1 cache.
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Processors that feature Hyper-Threading is detected using `EDX[28]` of
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CPUID leaf 0x1 (Basic CPUID Information).
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The order of `Maximum number of addressable IDs for logical processors
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sharing this cache` from `EAX[25:14]` of level-0 of CPUID 0x4 provides
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the shifts from the APIC ID required to compute the Core ID.
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The APIC ID and Package information is computed using the data from
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CPUID leaf 0x1.
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4) CPUID leaf 0x00000001 (Basic CPUID Information)
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The mask and shifts to derive the Physical Package (socket) ID is
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computed using the `Maximum number of addressable IDs for logical
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processors in this physical package` from `EBX[23:16]` of CPUID leaf
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0x1.
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The APIC ID on the legacy platforms is derived from the `Initial APIC
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ID` field from `EBX[31:24]` of CPUID leaf 0x1.
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3) Centaur and Zhaoxin
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Similar to Intel, Centaur and Zhaoxin use a combination of CPUID leaf
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0x00000004 (Deterministic Cache Parameters Leaf) and CPUID leaf 0x00000001
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(Basic CPUID Information) to derive the topology information.
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System topology examples
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========================
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