ARM: dts: qcom: apq8064: link LVDS clocks

Link LVDS clocks to the from MDP4 to the MMCC and back from the MMCC
to the MDP4 display controller.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-7-6b212160b44c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2025-04-25 12:51:57 +03:00
committed by Bjorn Andersson
parent b81dcdad43
commit d8dc4889af

View File

@@ -768,7 +768,8 @@ mmcc: clock-controller@4000000 {
<&dsi0_phy 0>,
<&dsi1_phy 1>,
<&dsi1_phy 0>,
<&hdmi_phy>;
<&hdmi_phy>,
<&mdp>;
clock-names = "pxo",
"pll3",
"pll8_vote",
@@ -776,7 +777,8 @@ mmcc: clock-controller@4000000 {
"dsi1pllbyte",
"dsi2pll",
"dsi2pllbyte",
"hdmipll";
"hdmipll",
"lvdspll";
};
l2cc: clock-controller@2011000 {
@@ -1435,13 +1437,19 @@ mdp: display-controller@5100000 {
<&mmcc MDP_AXI_CLK>,
<&mmcc MDP_LUT_CLK>,
<&mmcc HDMI_TV_CLK>,
<&mmcc MDP_TV_CLK>;
<&mmcc MDP_TV_CLK>,
<&mmcc LVDS_CLK>,
<&rpmcc RPM_PXO_CLK>;
clock-names = "core_clk",
"iface_clk",
"bus_clk",
"lut_clk",
"hdmi_clk",
"tv_clk";
"tv_clk",
"lcdc_clk",
"pxo";
#clock-cells = <0>;
iommus = <&mdp_port0 0
&mdp_port0 2