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drm/amd/pm: add pptable_funcs documentation (v3)
Documents the hooks in struct pptable_funcs. v2: Improved documentation accuracy. v3: Improved set_default_od_settings() definition. Signed-off-by: Ryan Taylor <Ryan.Taylor@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ryan Taylor
committed by
Alex Deucher
Alex Deucher
parent
9f18985dda
commit
d8a0b8dd69
@@ -469,120 +469,646 @@ struct smu_context
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struct i2c_adapter;
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/**
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* struct pptable_funcs - Callbacks used to interact with the SMU.
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*/
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struct pptable_funcs {
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/**
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* @run_btc: Calibrate voltage/frequency curve to fit the system's
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* power delivery and voltage margins. Required for adaptive
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* voltage frequency scaling (AVFS).
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*/
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int (*run_btc)(struct smu_context *smu);
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/**
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* @get_allowed_feature_mask: Get allowed feature mask.
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* &feature_mask: Array to store feature mask.
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* &num: Elements in &feature_mask.
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*/
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int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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/**
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* @get_current_power_state: Get the current power state.
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*
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* Return: Current power state on success, negative errno on failure.
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*/
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enum amd_pm_state_type (*get_current_power_state)(struct smu_context *smu);
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/**
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* @set_default_dpm_table: Retrieve the default overdrive settings from
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* the SMU.
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*/
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int (*set_default_dpm_table)(struct smu_context *smu);
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int (*set_power_state)(struct smu_context *smu);
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/**
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* @populate_umd_state_clk: Populate the UMD power state table with
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* defaults.
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*/
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int (*populate_umd_state_clk)(struct smu_context *smu);
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/**
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* @print_clk_levels: Print DPM clock levels for a clock domain
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* to buffer. Star current level.
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*
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* Used for sysfs interfaces.
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*/
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int (*print_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, char *buf);
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/**
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* @force_clk_levels: Set a range of allowed DPM levels for a clock
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* domain.
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* &clk_type: Clock domain.
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* &mask: Range of allowed DPM levels.
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*/
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int (*force_clk_levels)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t mask);
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/**
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* @od_edit_dpm_table: Edit the custom overdrive DPM table.
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* &type: Type of edit.
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* &input: Edit parameters.
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* &size: Size of &input.
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*/
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int (*od_edit_dpm_table)(struct smu_context *smu,
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enum PP_OD_DPM_TABLE_COMMAND type,
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long *input, uint32_t size);
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/**
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* @get_clock_by_type_with_latency: Get the speed and latency of a clock
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* domain.
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*/
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int (*get_clock_by_type_with_latency)(struct smu_context *smu,
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enum smu_clk_type clk_type,
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struct
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pp_clock_levels_with_latency
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*clocks);
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/**
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* @get_clock_by_type_with_voltage: Get the speed and voltage of a clock
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* domain.
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*/
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int (*get_clock_by_type_with_voltage)(struct smu_context *smu,
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enum amd_pp_clock_type type,
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struct
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pp_clock_levels_with_voltage
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*clocks);
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/**
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* @get_power_profile_mode: Print all power profile modes to
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* buffer. Star current mode.
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*/
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int (*get_power_profile_mode)(struct smu_context *smu, char *buf);
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/**
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* @set_power_profile_mode: Set a power profile mode. Also used to
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* create/set custom power profile modes.
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* &input: Power profile mode parameters.
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* &size: Size of &input.
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*/
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int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);
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/**
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* @dpm_set_vcn_enable: Enable/disable VCN engine dynamic power
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* management.
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*/
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int (*dpm_set_vcn_enable)(struct smu_context *smu, bool enable);
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/**
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* @dpm_set_jpeg_enable: Enable/disable JPEG engine dynamic power
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* management.
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*/
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int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);
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/**
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* @read_sensor: Read data from a sensor.
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* &sensor: Sensor to read data from.
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* &data: Sensor reading.
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* &size: Size of &data.
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*/
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int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,
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void *data, uint32_t *size);
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/**
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* @pre_display_config_changed: Prepare GPU for a display configuration
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* change.
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*
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* Disable display tracking and pin memory clock speed to maximum. Used
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* in display component synchronization.
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*/
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int (*pre_display_config_changed)(struct smu_context *smu);
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/**
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* @display_config_changed: Notify the SMU of the current display
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* configuration.
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*
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* Allows SMU to properly track blanking periods for memory clock
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* adjustment. Used in display component synchronization.
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*/
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int (*display_config_changed)(struct smu_context *smu);
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int (*apply_clocks_adjust_rules)(struct smu_context *smu);
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/**
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* @notify_smc_display_config: Applies display requirements to the
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* current power state.
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*
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* Optimize deep sleep DCEFclk and mclk for the current display
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* configuration. Used in display component synchronization.
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*/
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int (*notify_smc_display_config)(struct smu_context *smu);
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/**
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* @is_dpm_running: Check if DPM is running.
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*
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* Return: True if DPM is running, false otherwise.
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*/
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bool (*is_dpm_running)(struct smu_context *smu);
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/**
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* @get_fan_speed_rpm: Get the current fan speed in RPM.
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*/
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int (*get_fan_speed_rpm)(struct smu_context *smu, uint32_t *speed);
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/**
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* @set_watermarks_table: Configure and upload the watermarks tables to
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* the SMU.
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*/
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int (*set_watermarks_table)(struct smu_context *smu,
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struct pp_smu_wm_range_sets *clock_ranges);
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/**
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* @get_thermal_temperature_range: Get safe thermal limits in Celcius.
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*/
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int (*get_thermal_temperature_range)(struct smu_context *smu, struct smu_temperature_range *range);
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/**
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* @get_uclk_dpm_states: Get memory clock DPM levels in kHz.
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* &clocks_in_khz: Array of DPM levels.
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* &num_states: Elements in &clocks_in_khz.
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*/
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int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states);
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/**
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* @set_default_od_settings: Set the overdrive tables to defaults.
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*/
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int (*set_default_od_settings)(struct smu_context *smu);
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/**
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* @set_performance_level: Set a performance level.
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*/
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int (*set_performance_level)(struct smu_context *smu, enum amd_dpm_forced_level level);
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/**
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* @display_disable_memory_clock_switch: Enable/disable dynamic memory
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* clock switching.
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*
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* Disabling this feature forces memory clock speed to maximum.
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* Enabling sets the minimum memory clock capable of driving the
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* current display configuration.
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*/
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int (*display_disable_memory_clock_switch)(struct smu_context *smu, bool disable_memory_clock_switch);
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/**
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* @dump_pptable: Print the power play table to the system log.
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*/
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void (*dump_pptable)(struct smu_context *smu);
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/**
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* @get_power_limit: Get the device's power limits.
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*/
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int (*get_power_limit)(struct smu_context *smu);
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/**
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* @set_df_cstate: Set data fabric cstate.
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*/
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int (*set_df_cstate)(struct smu_context *smu, enum pp_df_cstate state);
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/**
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* @allow_xgmi_power_down: Enable/disable external global memory
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* interconnect power down.
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*/
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int (*allow_xgmi_power_down)(struct smu_context *smu, bool en);
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/**
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* @update_pcie_parameters: Update and upload the system's PCIe
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* capabilites to the SMU.
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* &pcie_gen_cap: Maximum allowed PCIe generation.
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* &pcie_width_cap: Maximum allowed PCIe width.
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*/
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int (*update_pcie_parameters)(struct smu_context *smu, uint32_t pcie_gen_cap, uint32_t pcie_width_cap);
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/**
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* @i2c_init: Initialize i2c.
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*
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* The i2c bus is used internally by the SMU voltage regulators and
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* other devices. The i2c's EEPROM also stores bad page tables on boards
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* with ECC.
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*/
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int (*i2c_init)(struct smu_context *smu, struct i2c_adapter *control);
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/**
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* @i2c_fini: Tear down i2c.
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*/
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void (*i2c_fini)(struct smu_context *smu, struct i2c_adapter *control);
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/**
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* @get_unique_id: Get the GPU's unique id. Used for asset tracking.
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*/
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void (*get_unique_id)(struct smu_context *smu);
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/**
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* @get_dpm_clock_table: Get a copy of the DPM clock table.
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*
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* Used by display component in bandwidth and watermark calculations.
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*/
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int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
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/**
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* @init_microcode: Request the SMU's firmware from the kernel.
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*/
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int (*init_microcode)(struct smu_context *smu);
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/**
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* @load_microcode: Load firmware onto the SMU.
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*/
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int (*load_microcode)(struct smu_context *smu);
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/**
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* @fini_microcode: Release the SMU's firmware.
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*/
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void (*fini_microcode)(struct smu_context *smu);
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/**
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* @init_smc_tables: Initialize the SMU tables.
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*/
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int (*init_smc_tables)(struct smu_context *smu);
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/**
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* @fini_smc_tables: Release the SMU tables.
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*/
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int (*fini_smc_tables)(struct smu_context *smu);
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/**
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* @init_power: Initialize the power gate table context.
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*/
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int (*init_power)(struct smu_context *smu);
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/**
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* @fini_power: Release the power gate table context.
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*/
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int (*fini_power)(struct smu_context *smu);
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/**
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* @check_fw_status: Check the SMU's firmware status.
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*
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* Return: Zero if check passes, negative errno on failure.
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*/
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int (*check_fw_status)(struct smu_context *smu);
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/**
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* @setup_pptable: Initialize the power play table and populate it with
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* default values.
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*/
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int (*setup_pptable)(struct smu_context *smu);
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/**
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* @get_vbios_bootup_values: Get default boot values from the VBIOS.
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*/
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int (*get_vbios_bootup_values)(struct smu_context *smu);
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/**
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* @check_fw_version: Print driver and SMU interface versions to the
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* system log.
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*
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* Interface mismatch is not a critical failure.
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*/
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int (*check_fw_version)(struct smu_context *smu);
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/**
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* @powergate_sdma: Power up/down system direct memory access.
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*/
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int (*powergate_sdma)(struct smu_context *smu, bool gate);
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/**
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* @set_gfx_cgpg: Enable/disable graphics engine course grain power
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* gating.
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*/
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int (*set_gfx_cgpg)(struct smu_context *smu, bool enable);
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/**
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* @write_pptable: Write the power play table to the SMU.
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*/
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int (*write_pptable)(struct smu_context *smu);
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/**
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* @set_driver_table_location: Send the location of the driver table to
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* the SMU.
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*/
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int (*set_driver_table_location)(struct smu_context *smu);
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/**
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* @set_tool_table_location: Send the location of the tool table to the
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* SMU.
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*/
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int (*set_tool_table_location)(struct smu_context *smu);
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/**
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* @notify_memory_pool_location: Send the location of the memory pool to
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* the SMU.
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*/
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int (*notify_memory_pool_location)(struct smu_context *smu);
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/**
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* @system_features_control: Enable/disable all SMU features.
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*/
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int (*system_features_control)(struct smu_context *smu, bool en);
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/**
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* @send_smc_msg_with_param: Send a message with a parameter to the SMU.
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* &msg: Type of message.
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* ¶m: Message parameter.
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* &read_arg: SMU response (optional).
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*/
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int (*send_smc_msg_with_param)(struct smu_context *smu,
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enum smu_message_type msg, uint32_t param, uint32_t *read_arg);
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/**
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* @send_smc_msg: Send a message to the SMU.
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* &msg: Type of message.
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* &read_arg: SMU response (optional).
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*/
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int (*send_smc_msg)(struct smu_context *smu,
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enum smu_message_type msg,
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uint32_t *read_arg);
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/**
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* @init_display_count: Notify the SMU of the number of display
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* components in current display configuration.
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*/
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int (*init_display_count)(struct smu_context *smu, uint32_t count);
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/**
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* @set_allowed_mask: Notify the SMU of the features currently allowed
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* by the driver.
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*/
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int (*set_allowed_mask)(struct smu_context *smu);
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/**
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* @get_enabled_mask: Get a mask of features that are currently enabled
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* on the SMU.
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* &feature_mask: Array representing enabled feature mask.
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* &num: Elements in &feature_mask.
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*/
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int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
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/**
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* @feature_is_enabled: Test if a feature is enabled.
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*
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* Return: One if enabled, zero if disabled.
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*/
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int (*feature_is_enabled)(struct smu_context *smu, enum smu_feature_mask mask);
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/**
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* @disable_all_features_with_exception: Disable all features with
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* exception to those in &mask.
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*/
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int (*disable_all_features_with_exception)(struct smu_context *smu, enum smu_feature_mask mask);
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/**
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* @notify_display_change: Enable fast memory clock switching.
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*
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* Allows for fine grained memory clock switching but has more stringent
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* timing requirements.
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*/
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int (*notify_display_change)(struct smu_context *smu);
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/**
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* @set_power_limit: Set power limit in watts.
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*/
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int (*set_power_limit)(struct smu_context *smu, uint32_t n);
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/**
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* @init_max_sustainable_clocks: Populate max sustainable clock speed
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* table with values from the SMU.
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*/
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int (*init_max_sustainable_clocks)(struct smu_context *smu);
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/**
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* @enable_thermal_alert: Enable thermal alert interrupts.
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*/
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int (*enable_thermal_alert)(struct smu_context *smu);
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/**
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* @disable_thermal_alert: Disable thermal alert interrupts.
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*/
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int (*disable_thermal_alert)(struct smu_context *smu);
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/**
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* @set_min_dcef_deep_sleep: Set a minimum display fabric deep sleep
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* clock speed in MHz.
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*/
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int (*set_min_dcef_deep_sleep)(struct smu_context *smu, uint32_t clk);
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/**
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* @display_clock_voltage_request: Set a hard minimum frequency
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* for a clock domain.
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*/
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int (*display_clock_voltage_request)(struct smu_context *smu, struct
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pp_display_clock_request
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*clock_req);
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/**
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* @get_fan_control_mode: Get the current fan control mode.
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*/
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uint32_t (*get_fan_control_mode)(struct smu_context *smu);
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/**
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* @set_fan_control_mode: Set the fan control mode.
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*/
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int (*set_fan_control_mode)(struct smu_context *smu, uint32_t mode);
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/**
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* @set_fan_speed_rpm: Set a static fan speed in RPM.
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*/
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int (*set_fan_speed_rpm)(struct smu_context *smu, uint32_t speed);
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/**
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* @set_xgmi_pstate: Set inter-chip global memory interconnect pstate.
|
||||
* &pstate: Pstate to set. D0 if Nonzero, D3 otherwise.
|
||||
*/
|
||||
int (*set_xgmi_pstate)(struct smu_context *smu, uint32_t pstate);
|
||||
|
||||
/**
|
||||
* @gfx_off_control: Enable/disable graphics engine poweroff.
|
||||
*/
|
||||
int (*gfx_off_control)(struct smu_context *smu, bool enable);
|
||||
|
||||
|
||||
/**
|
||||
* @get_gfx_off_status: Get graphics engine poweroff status.
|
||||
*
|
||||
* Return:
|
||||
* 0 - GFXOFF(default).
|
||||
* 1 - Transition out of GFX State.
|
||||
* 2 - Not in GFXOFF.
|
||||
* 3 - Transition into GFXOFF.
|
||||
*/
|
||||
uint32_t (*get_gfx_off_status)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @register_irq_handler: Register interupt request handlers.
|
||||
*/
|
||||
int (*register_irq_handler)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @set_azalia_d3_pme: Wake the audio decode engine from d3 sleep.
|
||||
*/
|
||||
int (*set_azalia_d3_pme)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @get_max_sustainable_clocks_by_dc: Get a copy of the max sustainable
|
||||
* clock speeds table.
|
||||
*
|
||||
* Provides a way for the display component (DC) to get the max
|
||||
* sustainable clocks from the SMU.
|
||||
*/
|
||||
int (*get_max_sustainable_clocks_by_dc)(struct smu_context *smu, struct pp_smu_nv_clock_table *max_clocks);
|
||||
|
||||
/**
|
||||
* @baco_is_support: Check if GPU supports BACO (Bus Active, Chip Off).
|
||||
*/
|
||||
bool (*baco_is_support)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @baco_get_state: Get the current BACO state.
|
||||
*
|
||||
* Return: Current BACO state.
|
||||
*/
|
||||
enum smu_baco_state (*baco_get_state)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @baco_set_state: Enter/exit BACO.
|
||||
*/
|
||||
int (*baco_set_state)(struct smu_context *smu, enum smu_baco_state state);
|
||||
|
||||
/**
|
||||
* @baco_enter: Enter BACO.
|
||||
*/
|
||||
int (*baco_enter)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @baco_exit: Exit Baco.
|
||||
*/
|
||||
int (*baco_exit)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @mode1_reset_is_support: Check if GPU supports mode1 reset.
|
||||
*/
|
||||
bool (*mode1_reset_is_support)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @mode1_reset: Perform mode1 reset.
|
||||
*
|
||||
* Complete GPU reset.
|
||||
*/
|
||||
int (*mode1_reset)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @mode2_reset: Perform mode2 reset.
|
||||
*
|
||||
* Mode2 reset generally does not reset as many IPs as mode1 reset. The
|
||||
* IPs reset varies by asic.
|
||||
*/
|
||||
int (*mode2_reset)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @get_dpm_ultimate_freq: Get the hard frequency range of a clock
|
||||
* domain in MHz.
|
||||
*/
|
||||
int (*get_dpm_ultimate_freq)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t *min, uint32_t *max);
|
||||
|
||||
/**
|
||||
* @set_soft_freq_limited_range: Set the soft frequency range of a clock
|
||||
* domain in MHz.
|
||||
*/
|
||||
int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);
|
||||
|
||||
/**
|
||||
* @set_power_source: Notify the SMU of the current power source.
|
||||
*/
|
||||
int (*set_power_source)(struct smu_context *smu, enum smu_power_src_type power_src);
|
||||
|
||||
/**
|
||||
* @log_thermal_throttling_event: Print a thermal throttling warning to
|
||||
* the system's log.
|
||||
*/
|
||||
void (*log_thermal_throttling_event)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @get_pp_feature_mask: Print a human readable table of enabled
|
||||
* features to buffer.
|
||||
*/
|
||||
size_t (*get_pp_feature_mask)(struct smu_context *smu, char *buf);
|
||||
|
||||
/**
|
||||
* @set_pp_feature_mask: Request the SMU enable/disable features to
|
||||
* match those enabled in &new_mask.
|
||||
*/
|
||||
int (*set_pp_feature_mask)(struct smu_context *smu, uint64_t new_mask);
|
||||
|
||||
/**
|
||||
* @get_gpu_metrics: Get a copy of the GPU metrics table from the SMU.
|
||||
*
|
||||
* Return: Size of &table
|
||||
*/
|
||||
ssize_t (*get_gpu_metrics)(struct smu_context *smu, void **table);
|
||||
|
||||
/**
|
||||
* @enable_mgpu_fan_boost: Enable multi-GPU fan boost.
|
||||
*/
|
||||
int (*enable_mgpu_fan_boost)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @gfx_ulv_control: Enable/disable ultra low voltage.
|
||||
*/
|
||||
int (*gfx_ulv_control)(struct smu_context *smu, bool enablement);
|
||||
|
||||
/**
|
||||
* @deep_sleep_control: Enable/disable deep sleep.
|
||||
*/
|
||||
int (*deep_sleep_control)(struct smu_context *smu, bool enablement);
|
||||
|
||||
/**
|
||||
* @get_fan_parameters: Get fan parameters.
|
||||
*
|
||||
* Get maximum fan speed from the power play table.
|
||||
*/
|
||||
int (*get_fan_parameters)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @post_init: Helper function for asic specific workarounds.
|
||||
*/
|
||||
int (*post_init)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @interrupt_work: Work task scheduled from SMU interrupt handler.
|
||||
*/
|
||||
void (*interrupt_work)(struct smu_context *smu);
|
||||
|
||||
/**
|
||||
* @gpo_control: Enable/disable graphics power optimization if supported.
|
||||
*/
|
||||
int (*gpo_control)(struct smu_context *smu, bool enablement);
|
||||
|
||||
/**
|
||||
* @gfx_state_change_set: Send the current graphics state to the SMU.
|
||||
*/
|
||||
int (*gfx_state_change_set)(struct smu_context *smu, uint32_t state);
|
||||
|
||||
/**
|
||||
* @set_fine_grain_gfx_freq_parameters: Set fine grain graphics clock
|
||||
* parameters to defaults.
|
||||
*/
|
||||
int (*set_fine_grain_gfx_freq_parameters)(struct smu_context *smu);
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user