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clk: eyeq: require clock index with phandle in all cases

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We used to let compatibles with a single clock exposed to not have
a cell. Switch away from that and enforce a cell in all cases.

This is done at the same time as some compatibles
(mobileye,eyeq6h-{central,west}-olb) go from one to more clocks
exposed. Let's do the same switch and avoid future devicetree
work if/when others follow.

Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Link: https://lore.kernel.org/r/20241106-mbly-clk-v2-4-84cfefb3f485@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Théo Lebrun
2024-11-06 17:03:55 +01:00
committed by Stephen Boyd
parent 4eb5e9c6c4
commit d75fbc82ee
1 changed files with 2 additions and 10 deletions
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12
drivers/clk/clk-eyeq.c
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@@ -367,11 +367,7 @@ static int eqc_probe(struct platform_device *pdev)
eqc_probe_init_divs(dev, data, base, cells);
/* When providing a single clock, require no cell. */
if (clk_count == 1)
return of_clk_add_hw_provider(np, of_clk_hw_simple_get, cells->hws[0]);
else
return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
}
/* Required early for GIC timer (pll-cpu) and UARTs (pll-per). */
@@ -637,11 +633,7 @@ static void __init eqc_early_init(struct device_node *np,
}
}
/* When providing a single clock, require no cell. */
if (clk_count == 1)
ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, cells->hws[0]);
else
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, cells);
if (ret) {
pr_err("failed registering clk provider: %d\n", ret);
goto err;