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arm64: dts: qcom: sc7280: Flatten usb controller nodes

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Flatten usb controller nodes and update to using latest bindings
and flattened driver approach.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> # FP5
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250728035812.2762957-1-krishna.kurapati@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krishna Kurapati
2025-07-28 09:28:12 +05:30
committed by Bjorn Andersson
parent 642af3f3d5
commit d72cb0551d
9 changed files with 62 additions and 93 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts
View File

@@ -1364,12 +1364,10 @@ &ufs_mem_phy {
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_dwc3_hs {

7
arch/arm64/boot/dts/qcom/qcm6490-idp.dts
View File

@@ -751,12 +751,9 @@ &ufs_mem_phy {
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
/delete-property/ usb-role-switch;
dr_mode = "peripheral";
status = "okay";
};
&usb_1_hsphy {

6
arch/arm64/boot/dts/qcom/qcm6490-shift-otter.dts
View File

@@ -910,12 +910,10 @@ &ufs_mem_phy {
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_dwc3_hs {

6
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
View File

@@ -1127,12 +1127,10 @@ bluetooth: bluetooth {
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
status = "okay";
};
&usb_1_dwc3_hs {

6
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
View File

@@ -621,15 +621,13 @@ CROS_STD_MAIN_KEYMAP
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "host";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
/* 2.x hub on port 1 */
usb_hub_2_x: hub@1 {
compatible = "usbbda,5411";

6
arch/arm64/boot/dts/qcom/sc7280-idp.dts
View File

@@ -81,11 +81,9 @@ channel@403 {
};
&usb_2 {
status = "okay";
};
&usb_2_dwc3 {
dr_mode = "otg";
status = "okay";
};
&usb_2_hsphy {

6
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
View File

@@ -520,11 +520,9 @@ &ufs_mem_phy {
};
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "host";
status = "okay";
};
&usb_1_hsphy {

106
arch/arm64/boot/dts/qcom/sc7280.dtsi
View File

@@ -3711,14 +3711,10 @@ usb_dp_qmpphy_dp_in: endpoint {
};
};
usb_2: usb@8cf8800 {
compatible = "qcom,sc7280-dwc3", "qcom,dwc3";
reg = <0 0x08cf8800 0 0x400>;
usb_2: usb@8c00000 {
compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3";
reg = <0 0x08c00000 0 0xfc100>;
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma-ranges;
clocks = <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MASTER_CLK>,
@@ -3735,11 +3731,13 @@ usb_2: usb@8cf8800 {
<&gcc GCC_USB30_SEC_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq";
@@ -3753,24 +3751,19 @@ usb_2: usb@8cf8800 {
<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_USB2 0>;
interconnect-names = "usb-ddr", "apps-usb";
usb_2_dwc3: usb@8c00000 {
compatible = "snps,dwc3";
reg = <0 0x08c00000 0 0xe000>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0xa0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
usb-role-switch;
iommus = <&apps_smmu 0xa0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
usb-role-switch;
port {
usb2_role_switch: endpoint {
remote-endpoint = <&eud_ep>;
};
port {
usb2_role_switch: endpoint {
remote-endpoint = <&eud_ep>;
};
};
};
@@ -4252,14 +4245,10 @@ compute-cb@14 {
};
};
usb_1: usb@a6f8800 {
compatible = "qcom,sc7280-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
usb_1: usb@a600000 {
compatible = "qcom,sc7280-dwc3", "qcom,snps-dwc3";
reg = <0 0x0a600000 0 0xfc100>;
status = "disabled";
#address-cells = <2>;
#size-cells = <2>;
ranges;
dma-ranges;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -4276,12 +4265,14 @@ usb_1: usb@a6f8800 {
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "pwr_event",
interrupt-names = "dwc_usb3",
"pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
@@ -4298,37 +4289,32 @@ usb_1: usb@a6f8800 {
wakeup-source;
usb_1_dwc3: usb@a600000 {
compatible = "snps,dwc3";
reg = <0 0x0a600000 0 0xe000>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
iommus = <&apps_smmu 0xe0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
iommus = <&apps_smmu 0xe0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
ports {
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
port@0 {
reg = <0>;
usb_1_dwc3_hs: endpoint {
};
usb_1_dwc3_hs: endpoint {
};
};
port@1 {
reg = <1>;
port@1 {
reg = <1>;
usb_1_dwc3_ss: endpoint {
remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
usb_1_dwc3_ss: endpoint {
remote-endpoint = <&usb_dp_qmpphy_usb_ss_in>;
};
};
};

6
arch/arm64/boot/dts/qcom/sm7325-nothing-spacewar.dts
View File

@@ -1425,16 +1425,14 @@ &ufs_mem_phy {
&usb_1 {
/* USB 2.0 only */
qcom,select-utmi-as-pipe-clk;
status = "okay";
};
&usb_1_dwc3 {
dr_mode = "otg";
usb-role-switch;
maximum-speed = "high-speed";
/* Remove USB3 phy */
phys = <&usb_1_hsphy>;
phy-names = "usb2-phy";
status = "okay";
};
&usb_1_dwc3_hs {