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PCI: tegra: Read "dbi" base address to program in application logic
PCIe controller in Tegra194 requires the "dbi" region base address to be programmed in one of the application logic registers to enable CPU access to the "dbi" region. But, commita0fd361db8("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code") moved the code that reads the whereabouts of "dbi" region to the common code causing the existing code in pcie-tegra194.c file to program NULL in the application logic registers. This is causing null pointer dereference when the "dbi" registers are accessed. This issue is fixed by explicitly reading the "dbi" base address from DT node. Link: https://lore.kernel.org/r/20201125192554.5401-1-vidyas@nvidia.com Fixes:a0fd361db8("PCI: dwc: Move "dbi", "dbi2", and "addr_space" resource setup into common code") Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
committed by
Lorenzo Pieralisi
parent
369b868f4a
commit
d5353c00cf
@@ -1063,9 +1063,16 @@ static int tegra_pcie_enable_phy(struct tegra_pcie_dw *pcie)
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static int tegra_pcie_dw_parse_dt(struct tegra_pcie_dw *pcie)
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{
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struct platform_device *pdev = to_platform_device(pcie->dev);
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struct device_node *np = pcie->dev->of_node;
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int ret;
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pcie->dbi_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dbi");
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if (!pcie->dbi_res) {
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dev_err(pcie->dev, "Failed to find \"dbi\" region\n");
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return -ENODEV;
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}
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ret = of_property_read_u32(np, "nvidia,aspm-cmrt-us", &pcie->aspm_cmrt);
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if (ret < 0) {
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dev_info(pcie->dev, "Failed to read ASPM T_cmrt: %d\n", ret);
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