drm/amdgpu: update the handle ptr in sw_init

update the *handle to amdgpu_ip_block ptr for all
functions pointers of sw_init.

Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sunil Khatri
2024-09-26 14:30:28 +05:30
committed by Alex Deucher
parent 3138ab2c5b
commit d5347e8d27
87 changed files with 169 additions and 170 deletions

View File

@@ -98,9 +98,9 @@ enum {
ACP_TILE_DSP2,
};
static int acp_sw_init(void *handle)
static int acp_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
adev->acp.parent = adev->dev;

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@@ -2851,7 +2851,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
for (i = 0; i < adev->num_ip_blocks; i++) {
if (!adev->ip_blocks[i].status.valid)
continue;
r = adev->ip_blocks[i].version->funcs->sw_init((void *)adev);
r = adev->ip_blocks[i].version->funcs->sw_init(&adev->ip_blocks[i]);
if (r) {
DRM_ERROR("sw_init of IP block <%s> failed %d\n",
adev->ip_blocks[i].version->funcs->name, r);

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@@ -33,7 +33,7 @@
#include "isp_v4_1_0.h"
#include "isp_v4_1_1.h"
static int isp_sw_init(void *handle)
static int isp_sw_init(struct amdgpu_ip_block *ip_block)
{
return 0;
}

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@@ -421,9 +421,9 @@ static bool psp_get_runtime_db_entry(struct amdgpu_device *adev,
return ret;
}
static int psp_sw_init(void *handle)
static int psp_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct psp_context *psp = &adev->psp;
int ret;
struct psp_runtime_boot_cfg_entry boot_cfg_entry;

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@@ -794,9 +794,9 @@ static int umsch_mm_late_init(struct amdgpu_ip_block *ip_block)
return umsch_mm_test(adev);
}
static int umsch_mm_sw_init(void *handle)
static int umsch_mm_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
r = umsch_mm_init(adev);

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@@ -493,10 +493,10 @@ const struct drm_mode_config_funcs amdgpu_vkms_mode_funcs = {
.atomic_commit = drm_atomic_helper_commit,
};
static int amdgpu_vkms_sw_init(void *handle)
static int amdgpu_vkms_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
adev->amdgpu_vkms_output = kcalloc(adev->mode_info.num_crtc,
sizeof(struct amdgpu_vkms_output), GFP_KERNEL);

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@@ -356,9 +356,9 @@ static int vpe_common_init(struct amdgpu_vpe *vpe)
return 0;
}
static int vpe_sw_init(void *handle)
static int vpe_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_vpe *vpe = &adev->vpe;
int ret;

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@@ -2124,7 +2124,7 @@ static int cik_common_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int cik_common_sw_init(void *handle)
static int cik_common_sw_init(struct amdgpu_ip_block *ip_block)
{
return 0;
}

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@@ -297,10 +297,10 @@ static int cik_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int cik_ih_sw_init(void *handle)
static int cik_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);
if (r)

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@@ -937,10 +937,10 @@ static int cik_sdma_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int cik_sdma_sw_init(void *handle)
static int cik_sdma_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r, i;
/* SDMA trap event */

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@@ -288,10 +288,10 @@ static int cz_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int cz_ih_sw_init(void *handle)
static int cz_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);
if (r)

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@@ -2765,10 +2765,10 @@ static int dce_v10_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int dce_v10_0_sw_init(void *handle)
static int dce_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (i = 0; i < adev->mode_info.num_crtc; i++) {
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);

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@@ -2891,10 +2891,10 @@ static int dce_v11_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int dce_v11_0_sw_init(void *handle)
static int dce_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (i = 0; i < adev->mode_info.num_crtc; i++) {
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);

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@@ -2664,11 +2664,11 @@ static int dce_v6_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int dce_v6_0_sw_init(void *handle)
static int dce_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, i;
bool ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (i = 0; i < adev->mode_info.num_crtc; i++) {
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);

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@@ -2680,10 +2680,10 @@ static int dce_v8_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int dce_v8_0_sw_init(void *handle)
static int dce_v8_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (i = 0; i < adev->mode_info.num_crtc; i++) {
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, i + 1, &adev->crtc_irq);

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@@ -4683,11 +4683,11 @@ static void gfx_v10_0_alloc_ip_dump(struct amdgpu_device *adev)
}
}
static int gfx_v10_0_sw_init(void *handle)
static int gfx_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id = 0;
int xcc_id = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(10, 1, 10):

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@@ -1536,11 +1536,11 @@ static void gfx_v11_0_alloc_ip_dump(struct amdgpu_device *adev)
}
}
static int gfx_v11_0_sw_init(void *handle)
static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id = 0;
int xcc_id = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(11, 0, 0):

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@@ -1319,12 +1319,12 @@ static void gfx_v12_0_alloc_ip_dump(struct amdgpu_device *adev)
}
}
static int gfx_v12_0_sw_init(void *handle)
static int gfx_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id = 0;
unsigned num_compute_rings;
int xcc_id = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(12, 0, 0):

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@@ -3039,10 +3039,10 @@ static int gfx_v6_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int gfx_v6_0_sw_init(void *handle)
static int gfx_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int i, r;
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 181, &adev->gfx.eop_irq);

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@@ -4343,10 +4343,10 @@ static int gfx_v7_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
return 0;
}
static int gfx_v7_0_sw_init(void *handle)
static int gfx_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int i, j, k, r, ring_id;
switch (adev->asic_type) {

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@@ -1894,12 +1894,12 @@ static int gfx_v8_0_compute_ring_init(struct amdgpu_device *adev, int ring_id,
static void gfx_v8_0_sq_irq_work_func(struct work_struct *work);
static int gfx_v8_0_sw_init(void *handle)
static int gfx_v8_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id;
int xcc_id = 0;
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
switch (adev->asic_type) {
case CHIP_TONGA:

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@@ -2198,12 +2198,12 @@ static void gfx_v9_0_alloc_ip_dump(struct amdgpu_device *adev)
}
}
static int gfx_v9_0_sw_init(void *handle)
static int gfx_v9_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id;
int xcc_id = 0;
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
unsigned int hw_prio;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {

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@@ -1049,10 +1049,10 @@ static void gfx_v9_4_3_alloc_ip_dump(struct amdgpu_device *adev)
}
}
static int gfx_v9_4_3_sw_init(void *handle)
static int gfx_v9_4_3_sw_init(struct amdgpu_ip_block *ip_block)
{
int i, j, k, r, ring_id, xcc_id, num_xcc;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
case IP_VERSION(9, 4, 3):

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@@ -769,10 +769,10 @@ static int gmc_v10_0_gart_init(struct amdgpu_device *adev)
return amdgpu_gart_table_vram_alloc(adev);
}
static int gmc_v10_0_sw_init(void *handle)
static int gmc_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
adev->gfxhub.funcs->init(adev);

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@@ -729,10 +729,10 @@ static int gmc_v11_0_gart_init(struct amdgpu_device *adev)
return amdgpu_gart_table_vram_alloc(adev);
}
static int gmc_v11_0_sw_init(void *handle)
static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
adev->mmhub.funcs->init(adev);

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@@ -731,10 +731,10 @@ static int gmc_v12_0_gart_init(struct amdgpu_device *adev)
return amdgpu_gart_table_vram_alloc(adev);
}
static int gmc_v12_0_sw_init(void *handle)
static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, vram_width = 0, vram_type = 0, vram_vendor = 0;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
adev->mmhub.funcs->init(adev);

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@@ -799,10 +799,10 @@ static unsigned int gmc_v6_0_get_vbios_fb_size(struct amdgpu_device *adev)
return size;
}
static int gmc_v6_0_sw_init(void *handle)
static int gmc_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

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@@ -968,10 +968,10 @@ static unsigned int gmc_v7_0_get_vbios_fb_size(struct amdgpu_device *adev)
return size;
}
static int gmc_v7_0_sw_init(void *handle)
static int gmc_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

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@@ -1076,10 +1076,10 @@ static unsigned int gmc_v8_0_get_vbios_fb_size(struct amdgpu_device *adev)
#define mmMC_SEQ_MISC0_FIJI 0xA71
static int gmc_v8_0_sw_init(void *handle)
static int gmc_v8_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
set_bit(AMDGPU_GFXHUB(0), adev->vmhubs_mask);

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@@ -1987,10 +1987,10 @@ static void gmc_v9_4_3_init_vram_info(struct amdgpu_device *adev)
adev->gmc.vram_width = 128 * 64;
}
static int gmc_v9_0_sw_init(void *handle)
static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r, vram_width = 0, vram_type = 0, vram_vendor = 0, dma_addr_bits;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
unsigned long inst_mask = adev->aid_mask;
adev->gfxhub.funcs->init(adev);

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@@ -287,10 +287,10 @@ static int iceland_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int iceland_ih_sw_init(void *handle)
static int iceland_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);
if (r)

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@@ -568,10 +568,10 @@ static int ih_v6_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int ih_v6_0_sw_init(void *handle)
static int ih_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr;
r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_IH, 0,

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@@ -547,10 +547,10 @@ static int ih_v6_1_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int ih_v6_1_sw_init(void *handle)
static int ih_v6_1_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr;
r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_IH, 0,

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@@ -537,10 +537,10 @@ static int ih_v7_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int ih_v7_0_sw_init(void *handle)
static int ih_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr;
r = amdgpu_irq_add_id(adev, SOC21_IH_CLIENTID_IH, 0,

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@@ -481,9 +481,9 @@ int jpeg_v1_0_early_init(struct amdgpu_ip_block *ip_block)
* @handle: amdgpu_device pointer
*
*/
int jpeg_v1_0_sw_init(void *handle)
int jpeg_v1_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r;

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@@ -25,7 +25,7 @@
#define __JPEG_V1_0_H__
int jpeg_v1_0_early_init(struct amdgpu_ip_block *ip_block);
int jpeg_v1_0_sw_init(void *handle);
int jpeg_v1_0_sw_init(struct amdgpu_ip_block *ip_block);
void jpeg_v1_0_sw_fini(void *handle);
void jpeg_v1_0_start(struct amdgpu_device *adev, int mode);

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@@ -65,9 +65,9 @@ static int jpeg_v2_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v2_0_sw_init(void *handle)
static int jpeg_v2_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r;

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@@ -85,11 +85,11 @@ static int jpeg_v2_5_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v2_5_sw_init(void *handle)
static int jpeg_v2_5_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
if (adev->jpeg.harvest_config & (1 << i))

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@@ -79,9 +79,9 @@ static int jpeg_v3_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v3_0_sw_init(void *handle)
static int jpeg_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r;

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@@ -74,9 +74,9 @@ static int jpeg_v4_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v4_0_sw_init(void *handle)
static int jpeg_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r;

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@@ -92,9 +92,9 @@ static int jpeg_v4_0_3_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v4_0_3_sw_init(void *handle)
static int jpeg_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int i, j, r, jpeg_inst;

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@@ -98,9 +98,9 @@ static int jpeg_v4_0_5_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v4_0_5_sw_init(void *handle)
static int jpeg_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r, i;

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@@ -66,9 +66,9 @@ static int jpeg_v5_0_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int jpeg_v5_0_0_sw_init(void *handle)
static int jpeg_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r;

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@@ -1361,9 +1361,9 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,
return 0;
}
static int mes_v11_0_sw_init(void *handle)
static int mes_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int pipe, r;
adev->mes.funcs = &mes_v11_0_funcs;

View File

@@ -1326,9 +1326,9 @@ static int mes_v12_0_mqd_sw_init(struct amdgpu_device *adev,
return 0;
}
static int mes_v12_0_sw_init(void *handle)
static int mes_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int pipe, r;
adev->mes.funcs = &mes_v12_0_funcs;

View File

@@ -551,10 +551,10 @@ static int navi10_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int navi10_ih_sw_init(void *handle)
static int navi10_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr;
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_IH, 0,

View File

@@ -973,9 +973,9 @@ static int nv_common_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int nv_common_sw_init(void *handle)
static int nv_common_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev))
xgpu_nv_mailbox_add_irq_id(adev);

View File

@@ -826,11 +826,11 @@ static int sdma_v2_4_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v2_4_sw_init(void *handle)
static int sdma_v2_4_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* SDMA trap event */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP,

View File

@@ -1106,11 +1106,11 @@ static int sdma_v3_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v3_0_sw_init(void *handle)
static int sdma_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* SDMA trap event */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_SDMA_TRAP,

View File

@@ -1792,11 +1792,11 @@ static int sdma_v4_0_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v4_0_sw_init(void *handle)
static int sdma_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_4_0);
uint32_t *ptr;

View File

@@ -1332,11 +1332,11 @@ static int sdma_v4_4_2_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v4_4_2_sw_init(void *handle)
static int sdma_v4_4_2_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
u32 aid_id;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_4_4_2);
uint32_t *ptr;

View File

@@ -1408,11 +1408,11 @@ static int sdma_v5_0_early_init(struct amdgpu_ip_block *ip_block)
}
static int sdma_v5_0_sw_init(void *handle)
static int sdma_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_5_0);
uint32_t *ptr;

View File

@@ -1314,11 +1314,11 @@ static unsigned sdma_v5_2_seq_to_trap_id(int seq_num)
return -EINVAL;
}
static int sdma_v5_2_sw_init(void *handle)
static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_5_2);
uint32_t *ptr;

View File

@@ -1313,11 +1313,11 @@ static int sdma_v6_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v6_0_sw_init(void *handle)
static int sdma_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_6_0);
uint32_t *ptr;

View File

@@ -1273,11 +1273,11 @@ static int sdma_v7_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int sdma_v7_0_sw_init(void *handle)
static int sdma_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
uint32_t reg_count = ARRAY_SIZE(sdma_reg_list_7_0);
uint32_t *ptr;

View File

@@ -2148,7 +2148,7 @@ static int si_common_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int si_common_sw_init(void *handle)
static int si_common_sw_init(struct amdgpu_ip_block *ip_block)
{
return 0;
}

View File

@@ -471,11 +471,11 @@ static int si_dma_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int si_dma_sw_init(void *handle)
static int si_dma_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* DMA0 trap event */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 224,

View File

@@ -165,10 +165,10 @@ static int si_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int si_ih_sw_init(void *handle)
static int si_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, false);
if (r)

View File

@@ -1217,9 +1217,9 @@ static int soc15_common_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int soc15_common_sw_init(void *handle)
static int soc15_common_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev))
xgpu_ai_mailbox_add_irq_id(adev);

View File

@@ -832,9 +832,9 @@ static int soc21_common_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int soc21_common_sw_init(void *handle)
static int soc21_common_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev))
xgpu_nv_mailbox_add_irq_id(adev);

View File

@@ -455,9 +455,9 @@ static int soc24_common_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int soc24_common_sw_init(void *handle)
static int soc24_common_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev))
xgpu_nv_mailbox_add_irq_id(adev);

View File

@@ -297,10 +297,10 @@ static int tonga_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int tonga_ih_sw_init(void *handle)
static int tonga_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_ih_ring_init(adev, &adev->irq.ih, 64 * 1024, true);
if (r)

View File

@@ -542,10 +542,10 @@ static int uvd_v3_1_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int uvd_v3_1_sw_init(void *handle)
static int uvd_v3_1_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
void *ptr;
uint32_t ucode_len;

View File

@@ -101,10 +101,10 @@ static int uvd_v4_2_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int uvd_v4_2_sw_init(void *handle)
static int uvd_v4_2_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
/* UVD TRAP */

View File

@@ -99,10 +99,10 @@ static int uvd_v5_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int uvd_v5_0_sw_init(void *handle)
static int uvd_v5_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
/* UVD TRAP */

View File

@@ -375,11 +375,11 @@ static int uvd_v6_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int uvd_v6_0_sw_init(void *handle)
static int uvd_v6_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* UVD TRAP */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_UVD_SYSTEM_MESSAGE, &adev->uvd.inst->irq);

View File

@@ -395,12 +395,12 @@ static int uvd_v7_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int uvd_v7_0_sw_init(void *handle)
static int uvd_v7_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, j, r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (j = 0; j < adev->uvd.num_uvd_inst; j++) {
if (adev->uvd.harvest_config & (1 << j))

View File

@@ -410,11 +410,11 @@ static int vce_v2_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vce_v2_0_sw_init(void *handle)
static int vce_v2_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int r, i;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* VCE */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq);

View File

@@ -415,9 +415,9 @@ static int vce_v3_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vce_v3_0_sw_init(void *handle)
static int vce_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int r, i;

View File

@@ -422,9 +422,9 @@ static int vce_v4_0_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vce_v4_0_sw_init(void *handle)
static int vce_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
unsigned size;

View File

@@ -122,13 +122,13 @@ static int vcn_v1_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v1_0_sw_init(void *handle)
static int vcn_v1_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_1_0);
uint32_t *ptr;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
/* VCN DEC TRAP */
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN,
@@ -197,7 +197,7 @@ static int vcn_v1_0_sw_init(void *handle)
amdgpu_vcn_fwlog_init(adev->vcn.inst);
}
r = jpeg_v1_0_sw_init(handle);
r = jpeg_v1_0_sw_init(ip_block);
/* Allocate memory for VCN IP Dump buffer */
ptr = kcalloc(adev->vcn.num_vcn_inst * reg_count, sizeof(uint32_t), GFP_KERNEL);

View File

@@ -128,13 +128,13 @@ static int vcn_v2_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v2_0_sw_init(void *handle)
static int vcn_v2_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_2_0);
uint32_t *ptr;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
volatile struct amdgpu_fw_shared *fw_shared;
/* VCN DEC TRAP */

View File

@@ -155,13 +155,13 @@ static int vcn_v2_5_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v2_5_sw_init(void *handle)
static int vcn_v2_5_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, j, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_2_5);
uint32_t *ptr;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
for (j = 0; j < adev->vcn.num_vcn_inst; j++) {
if (adev->vcn.harvest_config & (1 << j))

View File

@@ -157,14 +157,14 @@ static int vcn_v3_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v3_0_sw_init(void *handle)
static int vcn_v3_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
int i, j, r;
int vcn_doorbell_index = 0;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_3_0);
uint32_t *ptr;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
r = amdgpu_vcn_sw_init(adev);
if (r)

View File

@@ -168,10 +168,10 @@ static int vcn_v4_0_fw_shared_init(struct amdgpu_device *adev, int inst_idx)
*
* Load firmware and sw initialization
*/
static int vcn_v4_0_sw_init(void *handle)
static int vcn_v4_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int i, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0);
uint32_t *ptr;

View File

@@ -123,9 +123,9 @@ static int vcn_v4_0_3_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v4_0_3_sw_init(void *handle)
static int vcn_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct amdgpu_ring *ring;
int i, r, vcn_inst;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_3);

View File

@@ -128,10 +128,10 @@ static int vcn_v4_0_5_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v4_0_5_sw_init(void *handle)
static int vcn_v4_0_5_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int i, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5);
uint32_t *ptr;

View File

@@ -112,10 +112,10 @@ static int vcn_v5_0_0_early_init(struct amdgpu_ip_block *ip_block)
*
* Load firmware and sw initialization
*/
static int vcn_v5_0_0_sw_init(void *handle)
static int vcn_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int i, r;
uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_5_0);
uint32_t *ptr;

View File

@@ -481,9 +481,9 @@ static int vega10_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vega10_ih_sw_init(void *handle)
static int vega10_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_IH, 0,

View File

@@ -535,9 +535,9 @@ static int vega20_ih_early_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vega20_ih_sw_init(void *handle)
static int vega20_ih_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
bool use_bus_addr = true;
int r;

View File

@@ -1689,9 +1689,9 @@ static int vi_common_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int vi_common_sw_init(void *handle)
static int vi_common_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
if (amdgpu_sriov_vf(adev))
xgpu_vi_mailbox_add_irq_id(adev);

View File

@@ -2509,9 +2509,9 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
return 0;
}
static int dm_sw_init(void *handle)
static int dm_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
int r;
adev->dm.cgs_device = amdgpu_cgs_create_device(adev);

View File

@@ -381,7 +381,7 @@ struct amd_ip_funcs {
char *name;
int (*early_init)(struct amdgpu_ip_block *ip_block);
int (*late_init)(struct amdgpu_ip_block *ip_block);
int (*sw_init)(void *handle);
int (*sw_init)(struct amdgpu_ip_block *ip_block);
int (*sw_fini)(void *handle);
int (*early_fini)(void *handle);
int (*hw_init)(void *handle);

View File

@@ -2979,11 +2979,10 @@ static int kv_dpm_late_init(struct amdgpu_ip_block *ip_block)
return 0;
}
static int kv_dpm_sw_init(void *handle)
static int kv_dpm_sw_init(struct amdgpu_ip_block *ip_block)
{
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230,
&adev->pm.dpm.thermal.irq);
if (ret)

View File

@@ -7718,10 +7718,10 @@ static int si_dpm_init_microcode(struct amdgpu_device *adev)
return err;
}
static int si_dpm_sw_init(void *handle)
static int si_dpm_sw_init(struct amdgpu_ip_block *ip_block)
{
int ret;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
ret = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 230, &adev->pm.dpm.thermal.irq);
if (ret)

View File

@@ -130,9 +130,9 @@ static void pp_swctf_delayed_work_handler(struct work_struct *work)
orderly_poweroff(true);
}
static int pp_sw_init(void *handle)
static int pp_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = handle;
struct amdgpu_device *adev = ip_block->adev;
struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
int ret = 0;

View File

@@ -1235,9 +1235,9 @@ static void smu_init_xgmi_plpd_mode(struct smu_context *smu)
}
}
static int smu_sw_init(void *handle)
static int smu_sw_init(struct amdgpu_ip_block *ip_block)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_device *adev = ip_block->adev;
struct smu_context *smu = adev->powerplay.pp_handle;
int ret;