mirrors/linux
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2025-12-27 13:30:45 -05:00
Code Issues Packages Projects Releases Wiki Activity

pinctrl: nuvoton: Convert to use struct group_desc

Browse Source 
The pin control core header provides struct group_desc.
Utilize it instead of open coded variants in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250318105932.2090926-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Andy Shevchenko
2025-03-18 12:57:17 +02:00
committed by Linus Walleij
parent 1bce744173
commit d52ecc655a
1 changed files with 33 additions and 37 deletions
Download Patch File Download Diff File Expand all files Collapse all files

70
drivers/pinctrl/nuvoton/pinctrl-ma35.c
View File

@@ -106,13 +106,6 @@ struct ma35_pin_setting {
unsigned int nconfigs;
};
struct ma35_pin_group {
const char *name;
unsigned int npins;
unsigned int *pins;
struct ma35_pin_setting *settings;
};
struct ma35_pin_bank {
void __iomem *reg_base;
struct clk *clk;
@@ -141,7 +134,7 @@ struct ma35_pinctrl {
struct pinctrl_dev *pctl;
const struct ma35_pinctrl_soc_info *info;
struct regmap *regmap;
struct ma35_pin_group *groups;
struct group_desc *groups;
unsigned int ngroups;
struct pinfunction *functions;
unsigned int nfunctions;
@@ -160,7 +153,7 @@ static const char *ma35_get_group_name(struct pinctrl_dev *pctldev, unsigned int
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
return npctl->groups[selector].name;
return npctl->groups[selector].grp.name;
}
static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector,
@@ -171,19 +164,19 @@ static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selecto
if (selector >= npctl->ngroups)
return -EINVAL;
*pins = npctl->groups[selector].pins;
*npins = npctl->groups[selector].npins;
*pins = npctl->groups[selector].grp.pins;
*npins = npctl->groups[selector].grp.npins;
return 0;
}
static struct ma35_pin_group *ma35_pinctrl_find_group_by_name(
const struct ma35_pinctrl *npctl, const char *name)
static struct group_desc *
ma35_pinctrl_find_group_by_name(const struct ma35_pinctrl *npctl, const char *name)
{
int i;
for (i = 0; i < npctl->ngroups; i++) {
if (!strcmp(npctl->groups[i].name, name))
if (!strcmp(npctl->groups[i].grp.name, name))
return &npctl->groups[i];
}
return NULL;
@@ -195,9 +188,10 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
unsigned int *num_maps)
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
struct ma35_pin_group *grp;
struct ma35_pin_setting *setting;
struct pinctrl_map *new_map;
struct device_node *parent;
struct group_desc *grp;
int map_num = 1;
int i;
@@ -211,7 +205,7 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
return -EINVAL;
}
map_num += grp->npins;
map_num += grp->grp.npins;
new_map = kcalloc(map_num, sizeof(*new_map), GFP_KERNEL);
if (!new_map)
return -ENOMEM;
@@ -223,17 +217,19 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev,
if (!parent)
return -EINVAL;
setting = grp->data;
new_map[0].type = PIN_MAP_TYPE_MUX_GROUP;
new_map[0].data.mux.function = parent->name;
new_map[0].data.mux.group = np->name;
of_node_put(parent);
new_map++;
for (i = 0; i < grp->npins; i++) {
for (i = 0; i < grp->grp.npins; i++) {
new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN;
new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->pins[i]);
new_map[i].data.configs.configs = grp->settings[i].configs;
new_map[i].data.configs.num_configs = grp->settings[i].nconfigs;
new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->grp.pins[i]);
new_map[i].data.configs.configs = setting[i].configs;
new_map[i].data.configs.num_configs = setting[i].nconfigs;
}
dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n",
(*map)->data.mux.function, (*map)->data.mux.group, map_num);
@@ -281,14 +277,14 @@ static int ma35_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selecto
unsigned int group)
{
struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev);
struct ma35_pin_group *grp = &npctl->groups[group];
struct ma35_pin_setting *setting = grp->settings;
struct group_desc *grp = &npctl->groups[group];
struct ma35_pin_setting *setting = grp->data;
u32 i, regval;
dev_dbg(npctl->dev, "enable function %s group %s\n",
npctl->functions[selector].name, npctl->groups[group].name);
npctl->functions[selector].name, grp->grp.name);
for (i = 0; i < grp->npins; i++) {
for (i = 0; i < grp->grp.npins; i++) {
regmap_read(npctl->regmap, setting->offset, &regval);
regval &= ~GENMASK(setting->shift + MA35_MFP_BITS_PER_PORT - 1,
setting->shift);
@@ -980,17 +976,16 @@ static const struct pinconf_ops ma35_pinconf_ops = {
.is_generic = true,
};
static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_group *grp,
static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp,
struct ma35_pinctrl *npctl, u32 index)
{
struct ma35_pin_setting *pin;
unsigned long *configs;
unsigned int nconfigs;
unsigned int *pins;
int i, j, count, ret;
u32 *elems;
grp->name = np->name;
ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &nconfigs);
if (ret)
return ret;
@@ -1003,21 +998,22 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro
if (!elems)
return -ENOMEM;
grp->grp.name = np->name;
ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count);
if (ret)
return -EINVAL;
grp->grp.npins = count / 3;
grp->npins = count / 3;
grp->pins = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL);
if (!grp->pins)
pins = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pins), GFP_KERNEL);
if (!pins)
return -ENOMEM;
grp->grp.pins = pins;
grp->settings = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->settings), GFP_KERNEL);
if (!grp->settings)
pin = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pin), GFP_KERNEL);
if (!pin)
return -ENOMEM;
pin = grp->settings;
grp->data = pin;
for (i = 0, j = 0; i < count; i += 3, j++) {
pin->offset = elems[i] * MA35_MFP_REG_SZ_PER_BANK + MA35_MFP_REG_BASE;
@@ -1025,7 +1021,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro
pin->muxval = elems[i + 2];
pin->configs = configs;
pin->nconfigs = nconfigs;
grp->pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift);
pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift);
pin++;
}
return 0;
@@ -1036,7 +1032,7 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc
{
struct device_node *child;
struct pinfunction *func;
struct ma35_pin_group *grp;
struct group_desc *grp;
static u32 grp_index;
const char **groups;
u32 ret, i = 0;