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drm/amd/display: Prevent PSR disable/reenable in HPD IRQ

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[Why]
When HPD IRQ occurs, it triggers a PSR disable and reenable
directly through dc layer.
Since it does not pass through the power layer, the layer
that tracks whether PSR is enabled or disabled and which
masks are set, this layer is now out of sync with the real
PSR state in FW.
Theoretically PSR can be enabled during hw programming
sequences or any other situation where we must disable PSR.

[How]
Check if PSR is enabled before doing PSR disable/reenable.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wyatt Wood
2021-11-24 12:50:20 -05:00
committed by Alex Deucher
parent be1ac692c0
commit d29b7980b5
1 changed files with 6 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
View File

@@ -3841,7 +3841,6 @@ static bool handle_hpd_irq_psr_sink(struct dc_link *link)
&psr_configuration.raw,
sizeof(psr_configuration.raw));
if (psr_configuration.bits.ENABLE) {
unsigned char dpcdbuf[3] = {0};
union psr_error_status psr_error_status;
@@ -3873,10 +3872,12 @@ static bool handle_hpd_irq_psr_sink(struct dc_link *link)
sizeof(psr_error_status.raw));
/* PSR error, disable and re-enable PSR */
allow_active = false;
dc_link_set_psr_allow_active(link, &allow_active, true, false, NULL);
allow_active = true;
dc_link_set_psr_allow_active(link, &allow_active, true, false, NULL);
if (link->psr_settings.psr_allow_active) {
allow_active = false;
dc_link_set_psr_allow_active(link, &allow_active, true, false, NULL);
allow_active = true;
dc_link_set_psr_allow_active(link, &allow_active, true, false, NULL);
}
return true;
} else if (psr_sink_psr_status.bits.SINK_SELF_REFRESH_STATUS ==