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Merge tag 'mhi-for-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mani/mhi into char-misc-next
Manivannan writes: MHI Host ======== - Fix conflict between MHI power up and SYSERR state transitions by issuing MHI reset only if the device is in SYSERR state while in SBL/PBL EEs. The device won't respond to reset if it is not in SYSERR state in SBL/PBL EEs. - Remove redundant call to pci_assign_resource() since PCI core calls this API internally. - Add Telit FN920C04 modem which is based on Qcom SDX35 chipset. * tag 'mhi-for-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mani/mhi: bus: mhi: host: pci_generic: Add Telit FN920C04 modem support bus: mhi: host: pci_generic: Remove redundant assign resource usage bus: mhi: host: Fix conflict between power_up and SYSERR
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@@ -782,6 +782,42 @@ static const struct mhi_pci_dev_info mhi_telit_fe990a_info = {
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.mru_default = 32768,
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};
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static const struct mhi_channel_config mhi_telit_fn920c04_channels[] = {
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MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 32, 0),
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MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 32, 0),
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MHI_CHANNEL_CONFIG_UL(4, "DIAG", 64, 1),
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MHI_CHANNEL_CONFIG_DL(5, "DIAG", 64, 1),
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MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
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MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
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MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
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MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
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MHI_CHANNEL_CONFIG_UL_FP(34, "FIREHOSE", 32, 0),
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MHI_CHANNEL_CONFIG_DL_FP(35, "FIREHOSE", 32, 0),
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MHI_CHANNEL_CONFIG_UL(92, "DUN2", 32, 1),
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MHI_CHANNEL_CONFIG_DL(93, "DUN2", 32, 1),
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MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 128, 2),
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MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 128, 3),
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};
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static const struct mhi_controller_config modem_telit_fn920c04_config = {
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.max_channels = 128,
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.timeout_ms = 50000,
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.num_channels = ARRAY_SIZE(mhi_telit_fn920c04_channels),
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.ch_cfg = mhi_telit_fn920c04_channels,
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.num_events = ARRAY_SIZE(mhi_telit_fn990_events),
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.event_cfg = mhi_telit_fn990_events,
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};
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static const struct mhi_pci_dev_info mhi_telit_fn920c04_info = {
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.name = "telit-fn920c04",
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.config = &modem_telit_fn920c04_config,
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.bar_num = MHI_PCI_DEFAULT_BAR_NUM,
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.dma_data_width = 32,
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.sideband_wake = false,
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.mru_default = 32768,
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.edl_trigger = true,
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};
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static const struct mhi_pci_dev_info mhi_netprisma_lcur57_info = {
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.name = "netprisma-lcur57",
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.edl = "qcom/prog_firehose_sdx24.mbn",
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@@ -806,6 +842,9 @@ static const struct mhi_pci_dev_info mhi_netprisma_fcun69_info = {
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static const struct pci_device_id mhi_pci_id_table[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0116),
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.driver_data = (kernel_ulong_t) &mhi_qcom_sa8775p_info },
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/* Telit FN920C04 (sdx35) */
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{PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x011a, 0x1c5d, 0x2020),
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.driver_data = (kernel_ulong_t) &mhi_telit_fn920c04_info },
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{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
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.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
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@@ -996,10 +1035,6 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl,
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struct pci_dev *pdev = to_pci_dev(mhi_cntrl->cntrl_dev);
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int err;
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err = pci_assign_resource(pdev, bar_num);
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if (err)
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return err;
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err = pcim_enable_device(pdev);
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if (err) {
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dev_err(&pdev->dev, "failed to enable pci device: %d\n", err);
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@@ -602,6 +602,7 @@ static void mhi_pm_sys_error_transition(struct mhi_controller *mhi_cntrl)
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struct mhi_cmd *mhi_cmd;
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struct mhi_event_ctxt *er_ctxt;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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bool reset_device = false;
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int ret, i;
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dev_dbg(dev, "Transitioning from PM state: %s to: %s\n",
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@@ -630,8 +631,23 @@ static void mhi_pm_sys_error_transition(struct mhi_controller *mhi_cntrl)
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/* Wake up threads waiting for state transition */
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wake_up_all(&mhi_cntrl->state_event);
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/* Trigger MHI RESET so that the device will not access host memory */
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if (MHI_REG_ACCESS_VALID(prev_state)) {
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/*
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* If the device is in PBL or SBL, it will only respond to
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* RESET if the device is in SYSERR state. SYSERR might
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* already be cleared at this point.
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*/
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enum mhi_state cur_state = mhi_get_mhi_state(mhi_cntrl);
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enum mhi_ee_type cur_ee = mhi_get_exec_env(mhi_cntrl);
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if (cur_state == MHI_STATE_SYS_ERR)
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reset_device = true;
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else if (cur_ee != MHI_EE_PBL && cur_ee != MHI_EE_SBL)
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reset_device = true;
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}
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/* Trigger MHI RESET so that the device will not access host memory */
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if (reset_device) {
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u32 in_reset = -1;
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unsigned long timeout = msecs_to_jiffies(mhi_cntrl->timeout_ms);
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