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ice: clear time_sync_en field for E825-C during reprogramming

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When programming the Clock Generation Unit for E285-C hardware, we need
to clear the time_sync_en bit of the DWORD 9 before we set the
frequency.

Co-developed-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Jacob Keller
2025-06-23 17:29:57 -07:00
committed by Tony Nguyen
parent 5cfb2ac280
commit d261d75530
1 changed files with 9 additions and 0 deletions
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9
drivers/net/ethernet/intel/ice/ice_tspll.c
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@@ -342,6 +342,14 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
return err;
}
if (dw9.time_sync_en) {
dw9.time_sync_en = 0;
err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);
if (err)
return err;
}
/* Set the frequency */
dw9.time_ref_freq_sel = clk_freq;
@@ -353,6 +361,7 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
dw9.time_ref_en = 1;
dw9.clk_eref0_en = 0;
}
dw9.time_sync_en = 1;
err = ice_write_cgu_reg(hw, ICE_CGU_R9, dw9.val);
if (err)
return err;