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KVM: selftests: Move XSAVE and OSXSAVE CPUID checks into AMX's init_regs()
Move the checks on XSAVE and OSXSAVE into init_regs() so that the XSAVE check is done before setting CR4.OSXSAVE, i.e. before a potential #GP, and so that the OSXSAVE check is performend immediately after enabling XSAVE in CR4. Signed-off-by: Aaron Lewis <aaronlewis@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> Link: https://lore.kernel.org/r/20230221163655.920289-12-mizhang@google.com [sean: keep XSAVE check, rewrite changelog accordingly] Signed-off-by: Sean Christopherson <seanjc@google.com>
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committed by
Sean Christopherson
parent
2ab3991b0b
commit
d01d4a4f7b
@@ -109,12 +109,6 @@ static inline void __xsavec(struct xstate *xstate, uint64_t rfbm)
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: "memory");
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}
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static inline void check_cpuid_xsave(void)
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{
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GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE));
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GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE));
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}
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static void check_xtile_info(void)
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{
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GUEST_ASSERT(this_cpu_has_p(X86_PROPERTY_XSTATE_MAX_SIZE_XCR0));
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@@ -153,10 +147,13 @@ static void init_regs(void)
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{
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uint64_t cr4, xcr0;
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GUEST_ASSERT(this_cpu_has(X86_FEATURE_XSAVE));
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/* turn on CR4.OSXSAVE */
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cr4 = get_cr4();
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cr4 |= X86_CR4_OSXSAVE;
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set_cr4(cr4);
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GUEST_ASSERT(this_cpu_has(X86_FEATURE_OSXSAVE));
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xcr0 = __xgetbv(0);
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xcr0 |= XFEATURE_MASK_XTILE;
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@@ -169,7 +166,6 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg,
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struct xstate *xstate)
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{
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init_regs();
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check_cpuid_xsave();
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check_xtile_info();
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GUEST_SYNC(1);
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