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ARM: dts: imx6qdl-sabresd: Pass reset-assert-us

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According to the AR8031 datasheet:

"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."

Pass the 'reset-assert-us' property to describe such requirement.

While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Fabio Estevam
2020-07-13 10:04:16 -03:00
committed by Shawn Guo
parent 91ea910809
commit cfe7d1bd11
1 changed files with 2 additions and 1 deletions
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3
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
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@@ -204,7 +204,6 @@ &fec {
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
phy-handle = <&phy>;
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
fsl,magic-packet;
status = "okay";
@@ -215,6 +214,8 @@ mdio {
phy: ethernet-phy@1 {
reg = <1>;
qca,clk-out-frequency = <125000000>;
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
};
};
};