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wifi: iwlwifi: trans: move ext_32khz_clock_valid to config
This value is used for the device start, so it's really part of the configuration. Signed-off-by: Johannes Berg <johannes.berg@intel.com> Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://patch.msgid.link/20250504132447.637ed7514587.I6c8fdeb3e2078a5fe9b755391e3ef7258ef2b279@changeid
This commit is contained in:
committed by
Miri Korenblit
parent
b8311ad5d4
commit
cf9aabf44b
@@ -421,6 +421,7 @@ struct iwl_dump_sanitize_ops {
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* @dsbr_urm_permanent: switch to URM permanently
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* @mbx_addr_0_step: step address data 0
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* @mbx_addr_1_step: step address data 1
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* @ext_32khz_clock_valid: if true, the external 32 KHz clock can be used
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*/
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struct iwl_trans_config {
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u8 cmd_queue;
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@@ -441,7 +442,8 @@ struct iwl_trans_config {
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u8 rx_mpdu_cmd, rx_mpdu_cmd_hdr_size;
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u8 dsbr_urm_fw_dependent:1,
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dsbr_urm_permanent:1;
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dsbr_urm_permanent:1,
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ext_32khz_clock_valid:1;
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u32 mbx_addr_0_step;
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u32 mbx_addr_1_step;
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@@ -882,7 +884,6 @@ struct iwl_trans_info {
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* @restart.mode: reset/restart error mode information
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* @restart.during_reset: error occurred during previous software reset
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* @trans_specific: data for the specific transport this is allocated for/with
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* @ext_32khz_clock_valid: if true, the external 32 KHz clock can be used
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* @request_top_reset: TOP reset was requested, used by the reset
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* worker that should be scheduled (with appropriate reason)
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* @do_top_reset: indication to the (PCIe) transport/context-info
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@@ -905,8 +906,6 @@ struct iwl_trans {
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bool reduced_cap_sku;
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bool step_urm;
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bool ext_32khz_clock_valid;
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bool pm_support;
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bool ltr_enabled;
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u8 pnvm_loaded:1;
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@@ -328,10 +328,16 @@ iwl_mld_configure_trans(struct iwl_op_mode *op_mode)
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struct iwl_mld *mld = IWL_OP_MODE_GET_MLD(op_mode);
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static const u8 no_reclaim_cmds[] = {TX_CMD};
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struct iwl_trans *trans = mld->trans;
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u32 eckv_value;
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iwl_bios_setup_step(trans, &mld->fwrt);
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iwl_uefi_get_step_table(trans);
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if (iwl_bios_get_eckv(&mld->fwrt, &eckv_value))
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IWL_DEBUG_RADIO(mld, "ECKV table doesn't exist in BIOS\n");
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else
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trans->conf.ext_32khz_clock_valid = !!eckv_value;
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trans->conf.rx_buf_size = iwl_amsdu_size_to_rxb_size();
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trans->conf.command_groups = iwl_mld_groups;
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trans->conf.command_groups_size = ARRAY_SIZE(iwl_mld_groups);
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@@ -369,7 +375,6 @@ iwl_op_mode_mld_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
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struct ieee80211_hw *hw;
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struct iwl_op_mode *op_mode;
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struct iwl_mld *mld;
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u32 eckv_value;
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int ret;
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/* Allocate and initialize a new hardware device */
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@@ -391,10 +396,6 @@ iwl_op_mode_mld_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
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iwl_mld_get_bios_tables(mld);
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iwl_uefi_get_sgom_table(trans, &mld->fwrt);
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if (iwl_bios_get_eckv(&mld->fwrt, &eckv_value))
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IWL_DEBUG_RADIO(mld, "ECKV table doesn't exist in BIOS\n");
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else
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trans->ext_32khz_clock_valid = !!eckv_value;
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mld->bios_enable_puncturing = iwl_uefi_get_puncturing(&mld->fwrt);
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iwl_mld_hw_set_regulatory(mld);
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@@ -138,7 +138,7 @@ int iwl_pcie_ctxt_info_gen3_alloc(struct iwl_trans *trans,
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if (trans->conf.dsbr_urm_permanent)
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control_flags_ext |= IWL_PRPH_SCRATCH_EXT_URM_PERM;
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if (trans->ext_32khz_clock_valid)
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if (trans->conf.ext_32khz_clock_valid)
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control_flags_ext |= IWL_PRPH_SCRATCH_EXT_32KHZ_CLK_VALID;
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/* Allocate prph scratch */
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