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synced 2026-05-10 05:39:42 -04:00
wifi: rtw89: 8852b: implement RFK multi-channel handling and support chanctx up to 2
To support multiple channels, 2 for this case, RFK requires to record each calibration result for each channel in different RFK tables, and also needs to notify FW. Then, when FW runs in MCC (multi-channel concurrency), it can switch to the corresponding calibration result according to the channel. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://patch.msgid.link/20250710042423.73617-15-pkshih@realtek.com
This commit is contained in:
committed by
Ping-Ke Shih
parent
504937dbad
commit
cefcf74ae0
@@ -628,8 +628,11 @@ static void rtw8852b_set_channel_help(struct rtw89_dev *rtwdev, bool enter,
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static void rtw8852b_rfk_init(struct rtw89_dev *rtwdev)
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{
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struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc;
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rtwdev->is_tssi_mode[RF_PATH_A] = false;
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rtwdev->is_tssi_mode[RF_PATH_B] = false;
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memset(rfk_mcc, 0, sizeof(*rfk_mcc));
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rtw8852b_dpk_init(rtwdev);
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rtw8852b_rck(rtwdev);
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@@ -643,6 +646,7 @@ static void rtw8852b_rfk_channel(struct rtw89_dev *rtwdev,
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enum rtw89_chanctx_idx chanctx_idx = rtwvif_link->chanctx_idx;
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enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx;
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rtw8852b_mcc_get_ch_info(rtwdev, phy_idx);
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rtw89_btc_ntfy_conn_rfk(rtwdev, true);
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rtw8852b_rx_dck(rtwdev, phy_idx, chanctx_idx);
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@@ -653,6 +657,7 @@ static void rtw8852b_rfk_channel(struct rtw89_dev *rtwdev,
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rtw8852b_dpk(rtwdev, phy_idx, chanctx_idx);
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rtw89_btc_ntfy_conn_rfk(rtwdev, false);
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rtw89_fw_h2c_rf_ntfy_mcc(rtwdev);
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}
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static void rtw8852b_rfk_band_changed(struct rtw89_dev *rtwdev,
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@@ -861,6 +866,10 @@ static const struct rtw89_chip_ops rtw8852b_chip_ops = {
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.btc_set_policy = rtw89_btc_set_policy_v1,
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};
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static const struct rtw89_chanctx_listener rtw8852b_chanctx_listener = {
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.callbacks[RTW89_CHANCTX_CALLBACK_RFK] = rtw8852b_rfk_chanctx_cb,
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};
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#ifdef CONFIG_PM
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static const struct wiphy_wowlan_support rtw_wowlan_stub_8852b = {
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.flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
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@@ -909,6 +918,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
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.nctl_post_table = NULL,
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.dflt_parms = &rtw89_8852b_dflt_parms,
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.rfe_parms_conf = NULL,
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.chanctx_listener = &rtw8852b_chanctx_listener,
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.txpwr_factor_bb = 3,
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.txpwr_factor_rf = 2,
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.txpwr_factor_mac = 1,
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@@ -917,7 +927,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
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.tssi_dbw_table = NULL,
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.support_macid_num = RTW89_MAX_MAC_ID_NUM,
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.support_link_num = 0,
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.support_chanctx_num = 0,
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.support_chanctx_num = 2,
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.support_rnr = false,
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.support_bands = BIT(NL80211_BAND_2GHZ) |
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BIT(NL80211_BAND_5GHZ),
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@@ -2,6 +2,7 @@
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/* Copyright(c) 2019-2022 Realtek Corporation
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*/
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#include "chan.h"
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#include "coex.h"
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#include "debug.h"
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#include "mac.h"
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@@ -1145,19 +1146,19 @@ static void _lok_res_table(struct rtw89_dev *rtwdev, u8 path, u8 ibias)
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static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path)
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{
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
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u8 ch = rfk_mcc->table_idx;
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bool is_fail1, is_fail2;
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u32 vbuff_i;
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u32 vbuff_q;
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u32 core_i;
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u32 core_q;
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u32 tmp;
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u8 ch;
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tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK);
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core_i = FIELD_GET(RR_TXMO_COI, tmp);
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core_q = FIELD_GET(RR_TXMO_COQ, tmp);
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ch = (iqk_info->iqk_times / 2) % RTW89_IQK_CHS_NR;
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if (core_i < 0x2 || core_i > 0x1d || core_q < 0x2 || core_q > 0x1d)
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is_fail1 = true;
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@@ -1386,26 +1387,11 @@ static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u
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enum rtw89_chanctx_idx chanctx_idx)
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{
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const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, chanctx_idx);
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
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u8 idx = rfk_mcc->table_idx;
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u32 reg_rf18;
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u32 reg_35c;
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u8 idx;
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u8 get_empty_table = false;
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for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) {
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if (iqk_info->iqk_mcc_ch[idx][path] == 0) {
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get_empty_table = true;
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break;
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}
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}
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rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (1)idx = %x\n", idx);
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if (!get_empty_table) {
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idx = iqk_info->iqk_table_idx[path] + 1;
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if (idx > 1)
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idx = 0;
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}
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rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (2)idx = %x\n", idx);
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reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK);
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reg_35c = rtw89_phy_read32_mask(rtwdev, R_CIRST, B_CIRST_SYN);
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@@ -1506,11 +1492,10 @@ static void _iqk_afebb_restore(struct rtw89_dev *rtwdev,
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static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path)
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{
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struct rtw89_iqk_info *iqk_info = &rtwdev->iqk;
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u8 idx;
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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u8 idx = rfk_mcc->table_idx;
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idx = iqk_info->iqk_table_idx[path];
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rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (3)idx = %x\n", idx);
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rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] idx = %x\n", idx);
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rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx);
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rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx);
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@@ -4179,3 +4164,49 @@ void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev,
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rtw8852b_ctrl_bw_ch(rtwdev, phy_idx, chan->channel, chan->band_type,
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chan->band_width);
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}
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void rtw8852b_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
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{
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const struct rtw89_chan *chan = rtw89_mgnt_chan_get(rtwdev, 0);
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struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
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struct rtw89_rfk_chan_desc desc[__RTW89_RFK_CHS_NR_V0] = {};
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u8 idx;
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for (idx = 0; idx < ARRAY_SIZE(desc); idx++) {
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struct rtw89_rfk_chan_desc *p = &desc[idx];
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p->ch = rfk_mcc->ch[idx];
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p->has_band = true;
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p->band = rfk_mcc->band[idx];
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}
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idx = rtw89_rfk_chan_lookup(rtwdev, desc, ARRAY_SIZE(desc), chan);
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rfk_mcc->ch[idx] = chan->channel;
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rfk_mcc->band[idx] = chan->band_type;
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rfk_mcc->table_idx = idx;
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}
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void rtw8852b_rfk_chanctx_cb(struct rtw89_dev *rtwdev,
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enum rtw89_chanctx_state state)
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{
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struct rtw89_dpk_info *dpk = &rtwdev->dpk;
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u8 path;
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switch (state) {
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case RTW89_CHANCTX_STATE_MCC_START:
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dpk->is_dpk_enable = false;
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for (path = 0; path < RTW8852B_DPK_RF_PATH; path++)
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_dpk_onoff(rtwdev, path, false);
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break;
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case RTW89_CHANCTX_STATE_MCC_STOP:
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dpk->is_dpk_enable = true;
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for (path = 0; path < RTW8852B_DPK_RF_PATH; path++)
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_dpk_onoff(rtwdev, path, false);
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rtw8852b_dpk(rtwdev, RTW89_PHY_0, RTW89_CHANCTX_0);
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break;
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default:
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break;
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}
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}
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@@ -27,5 +27,8 @@ void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start,
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void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev,
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const struct rtw89_chan *chan,
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enum rtw89_phy_idx phy_idx);
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void rtw8852b_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
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void rtw8852b_rfk_chanctx_cb(struct rtw89_dev *rtwdev,
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enum rtw89_chanctx_state state);
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#endif
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