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arm64: dts: renesas: r9a08g045: Add watchdog node

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Add the DT node for the watchdog IP accessible by Cortex-A of RZ/G3S
SoC (R9108G045).

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240122111115.2861835-10-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Claudiu Beznea
2024-01-22 13:11:14 +02:00
committed by Geert Uytterhoeven
parent 08e799f6bc
commit cee7bef61f
1 changed files with 14 additions and 0 deletions
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14
arch/arm64/boot/dts/renesas/r9a08g045.dtsi
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@@ -264,6 +264,20 @@ gic: interrupt-controller@12400000 {
<0x0 0x12440000 0 0x60000>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
};
wdt0: watchdog@12800800 {
compatible = "renesas,r9a08g045-wdt", "renesas,rzg2l-wdt";
reg = <0 0x12800800 0 0x400>;
clocks = <&cpg CPG_MOD R9A08G045_WDT0_PCLK>,
<&cpg CPG_MOD R9A08G045_WDT0_CLK>;
clock-names = "pclk", "oscclk";
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "wdt", "perrout";
resets = <&cpg R9A08G045_WDT0_PRESETN>;
power-domains = <&cpg>;
status = "disabled";
};
};
timer {