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Merge tag 'omap-for-v5.19/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt

Browse Source 
Devicetree changes for omaps

Devicetree changes for omaps:

- A series of changes to fix devicetree binding check warnings for omaps
  the the use of clock-output-names and clksel bindings

- Update Ethernet node names for omaps

- Pinctrl updates for logicpd-som-lv

- A series of updates for am335x-guardian

- Regulator range update for  am335x-baltos

Note that this branch is based on a upstream IOMMU fix as it's needed for
booting on some SoCs.

* tag 'omap-for-v5.19/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (29 commits)
  ARM: dts: am335x-baltos: update MPU regulator range
  ARM: dts: am335x: Guardian: Update comments
  ARM: dts: am335x: Guardian: Add gpio line manes
  ARM: dts: am335x: Guardian: Update interface pinmux
  ARM: dts: am335x: Guardian: Disable DMA property of USB1
  ARM: dts: am335x: Guardian: Enable UART port two
  ARM: dts: am335x: Guardian: Update backlight parameter
  ARM: dts: am335x: Guardian: Add lcd port
  ARM: dts: am335x: Guardian: Update regulator node name
  ARM: dts: am335x: Guardian: Update beeper label
  ARM: dts: am335x: Guardian: Update life led
  ARM: dts: am335x: Guardian: Remove mmc status led
  ARM: dts: am335x: Guardian: Disable poweroff support from RTC
  ARM: dts: am335x: Guardian: Add keypad
  ARM: dts: am335x: Guardian: Rename power button label
  ARM: dts: am335x: Guardian: Update NAND partition table
  ARM: dts: logicpd-som-lv: Move pinmuxing to peripheral nodes
  ARM: dts: omap3/4/5: fix ethernet node name for different OMAP boards
  ARM: dts: Drop custom clkctrl compatible and update omap5 l4per
  ARM: dts: Add clock-output-names for omap5
  ...

Link: https://lore.kernel.org/r/pull-1650961799-428630@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2022-05-03 15:26:13 +02:00
parent 3908ca6624 dff844e1fe
commit cbc842c2f2
15 changed files with 1583 additions and 556 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/am335x-baltos.dtsi
View File

@@ -285,7 +285,7 @@ vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1312500>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};

376
arch/arm/boot/dts/am335x-guardian.dts
View File

@@ -29,39 +29,44 @@ memory@80000000 {
reg = <0x80000000 0x10000000>; /* 256 MB */
};
gpio_keys {
guardian_buttons: gpio-keys {
pinctrl-names = "default";
pinctrl-0 = <&guardian_button_pins>;
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_pins>;
button21 {
select-button {
label = "guardian-select-button";
linux,code = <KEY_5>;
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
wakeup-source;
};
power-button {
label = "guardian-power-button";
linux,code = <KEY_POWER>;
gpios = <&gpio2 21 0>;
gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
guardian_leds: gpio-leds {
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
pinctrl-0 = <&guardian_led_pins>;
compatible = "gpio-leds";
led1 {
label = "green:heartbeat";
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
life-led {
label = "guardian:life-led";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
};
led2 {
label = "green:mmc0";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
gpio-poweroff {
compatible = "gpio-poweroff";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
panel {
@@ -100,20 +105,36 @@ panel-info {
};
pwm7: dmtimer-pwm {
guardian_beeper: dmtimer-pwm@7 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
pinctrl-0 = <&guardian_beeper_pins>;
ti,clock-source = <0x01>;
};
vmmcsd_fixed: regulator-3v3 {
vmmcsd_fixed: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
mt_keypad: mt_keypad@0 {
compatible = "gpio-mt-keypad";
debounce-delay-ms = <10>;
col-scan-delay-us = <2>;
keypad,num-lines = <5>;
linux,no-autorepeat;
gpio-activelow;
line-gpios = <
&gpio1 24 GPIO_ACTIVE_LOW /*gpio_56*/
&gpio1 23 GPIO_ACTIVE_LOW /*gpio_55*/
&gpio1 22 GPIO_ACTIVE_LOW /*gpio_54*/
&gpio1 20 GPIO_ACTIVE_LOW /*gpio_52*/
&gpio1 16 GPIO_ACTIVE_LOW /*gpio_48*/
>;
};
};
&elm {
@@ -133,28 +154,29 @@ nand@0,0 {
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-xfer-type = "prefetch-dma";
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,cs-rd-off-ns = <30>;
gpmc,cs-wr-off-ns = <30>;
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <30>;
gpmc,adv-wr-off-ns = <30>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,we-off-ns = <15>;
gpmc,oe-on-ns = <1>;
gpmc,oe-off-ns = <15>;
gpmc,access-ns = <30>;
gpmc,rd-cycle-ns = <30>;
gpmc,wr-cycle-ns = <30>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-access-ns = <0>;
gpmc,wr-data-mux-bus-ns = <0>;
/*
@@ -198,18 +220,33 @@ partition@5 {
};
partition@6 {
label = "u-boot-env";
reg = <0x300000 0x40000>;
label = "u-boot-2";
reg = <0x300000 0x100000>;
};
partition@7 {
label = "u-boot-env.backup1";
reg = <0x340000 0x40000>;
label = "u-boot-2.backup1";
reg = <0x400000 0x100000>;
};
partition@8 {
label = "u-boot-env";
reg = <0x500000 0x40000>;
};
partition@9 {
label = "u-boot-env.backup1";
reg = <0x540000 0x40000>;
};
partition@10 {
label = "splash-screen";
reg = <0x580000 0x40000>;
};
partition@11 {
label = "UBI";
reg = <0x380000 0x1fc80000>;
reg = <0x5c0000 0x1fa40000>;
};
};
};
@@ -228,6 +265,11 @@ tps: tps@24 {
&lcdc {
blue-and-red-wiring = "crossed";
status = "okay";
port {
lcdc_0: endpoint@0 {
remote-endpoint = <0>;
};
};
};
&mmc1 {
@@ -242,7 +284,6 @@ &mmc1 {
&rtc {
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
system-power-controller;
};
&spi0 {
@@ -255,14 +296,34 @@ &spi0 {
#include "tps65217.dtsi"
&tps {
/*
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
* mode") at poweroff. Most BeagleBone versions do not support RTC-only
* mode and risk hardware damage if this mode is entered.
*
* For details, see linux-omap mailing list May 2015 thread
* [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
* In particular, messages:
* http://www.spinics.net/lists/linux-omap/msg118585.html
* http://www.spinics.net/lists/linux-omap/msg118615.html
*
* You can override this later with
* &tps { /delete-property/ ti,pmic-shutdown-controller; }
* if you want to use RTC-only mode and made sure you are not affected
* by the hardware problems. (Tip: double-check by performing a current
* measurement after shutdown: it should be less than 1 mA.)
*/
ti,pmic-shutdown-controller;
interrupt-parent = <&intc>;
interrupts = <7>; /* NMI */
backlight {
isel = <1>; /* 1 - ISET1, 2 ISET2 */
fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
default-brightness = <100>;
fdim = <500>; /* TPS65217_BL_FDIM_500HZ */
default-brightness = <50>;
/* 1(on) - enable current sink, while initialization */
/* 0(off) - disable current sink, while initialization */
isink-en = <1>;
};
regulators {
@@ -272,6 +333,7 @@ dcdc1_reg: regulator@0 {
};
dcdc2_reg: regulator@1 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1351500>;
@@ -280,6 +342,7 @@ dcdc2_reg: regulator@1 {
};
dcdc3_reg: regulator@2 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
@@ -319,171 +382,364 @@ adc {
};
};
&gpio0 {
gpio-line-names =
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"MirxWakeup",
"",
"";
};
&gpio3 {
ti,gpio-always-on;
ti,no-reset-on-init;
gpio-line-names =
"",
"MirxBtReset",
"",
"CcVolAdcEn",
"MirxBlePause",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AspEn",
"",
"",
"",
"",
"",
"",
"BatVolAdcEn",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&usb0 {
dr_mode = "peripheral";
};
&usb1 {
dr_mode = "host";
/delete-property/dmas;
/delete-property/dma-names;
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin &gpio_pins>;
pinctrl-0 = <&clkout2_pin &guardian_interface_pins>;
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
/* xdma_event_intr1.clkout2 */
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
dmtimer7_pins: pinmux_dmtimer7_pins {
guardian_interface_pins: pinmux_interface_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
/* ADC_BATSENSE_EN */
/* (A14) MCASP0_AHCLKx.gpio3[21] */
AM33XX_IOPAD(0x9ac, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
/* ADC_COINCELL_EN */
/* (J16) MII1_TX_EN.gpio3[3] */
AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
/* ASP_ENABLE */
/* (A13) MCASP0_ACLKx.gpio3[14] */
AM33XX_IOPAD(0x990, PIN_OUTPUT_PULLUP | MUX_MODE7)
/* (D16) uart1_rxd.uart1_rxd */
AM33XX_IOPAD(0x980, PIN_INPUT | MUX_MODE7)
/* (D15) uart1_txd.uart1_txd */
AM33XX_IOPAD(0x984, PIN_INPUT | MUX_MODE7)
/*SWITCH-OFF_3V6*/
/* (M18) gpio0[1] */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE7)
/* MIRACULIX */
/* (H17) gmii1_crs.gpio3[1] */
AM33XX_IOPAD(0x90c, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
/* (H18) rmii1_refclk.gpio0[29] */
AM33XX_IOPAD(0x944, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
/* (J18) gmii1_txd3.gpio0[16] */
AM33XX_IOPAD(0x91c, PIN_INPUT | MUX_MODE7 )
/* (J17) gmii1_rxdv.gpio3[4] */
AM33XX_IOPAD(0x918, PIN_OUTPUT_PULLDOWN | MUX_MODE7 )
>;
};
gpio_keys_pins: pinmux_gpio_keys_pins {
guardian_beeper_pins: pinmux_dmtimer7_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5) /* (E18) timer7 */
>;
};
gpio_pins: pinmux_gpio_pins {
guardian_button_pins: pinmux_guardian_button_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
AM33XX_IOPAD(0x884, PIN_INPUT | MUX_MODE7) /* (V9) gpmc_csn2.gpio1[31] */
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
led_bl_pins: gpio_led_bl_pins {
pinctrl-single,pins = <
/* P9_14, gpmc_a[2].GPIO1[18] (backlight control) */
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE7)
>;
};
lcd_disen_pins: pinmux_lcd_disen_pins {
pinctrl-single,pins = <
/* P9_27, mcasp0_fsr.gpio3[19] (lcd_disen) */
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
>;
};
lcd_pins_default: pinmux_lcd_pins_default {
pinctrl-single,pins = <
/* (U10) gpmc_ad8.lcd_data23 */
AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (T10) gpmc_ad9.lcd_data22 */
AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (T11) gpmc_ad10.lcd_data21 */
AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (U12) gpmc_ad11.lcd_data20 */
AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (T12) gpmc_ad12.lcd_data19 */
AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (R12) gpmc_ad13.lcd_data18 */
AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (V13) gpmc_ad14.lcd_data17 */
AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* (U13) gpmc_ad15.lcd_data16 */
AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
/* lcd_data0.lcd_data0 */
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data1.lcd_data1 */
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data2.lcd_data2 */
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data3.lcd_data3 */
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data4.lcd_data4 */
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data5.lcd_data5 */
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data6.lcd_data6 */
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data7.lcd_data7 */
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data8.lcd_data8 */
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data9.lcd_data9 */
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data10.lcd_data10 */
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data11.lcd_data11 */
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data12.lcd_data12 */
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data13.lcd_data13 */
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data14.lcd_data14 */
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_data15.lcd_data15 */
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_vsync.lcd_vsync */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_hsync.lcd_hsync */
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_pclk.lcd_pclk */
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
/* lcd_ac_bias_en.lcd_ac_bias_en */
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
>;
};
lcd_pins_sleep: pinmux_lcd_pins_sleep {
pinctrl-single,pins = <
/* lcd_data0.lcd_data0 */
AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data1.lcd_data1 */
AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data2.lcd_data2 */
AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data3.lcd_data3 */
AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data4.lcd_data4 */
AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data5.lcd_data5 */
AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data6.lcd_data6 */
AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data7.lcd_data7 */
AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data8.lcd_data8 */
AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data9.lcd_data9 */
AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data10.lcd_data10 */
AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data11.lcd_data11 */
AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data12.lcd_data12 */
AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data13.lcd_data13 */
AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data14.lcd_data14 */
AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_data15.lcd_data15 */
AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_vsync.lcd_vsync */
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_hsync.lcd_hsync */
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_pclk.lcd_pclk */
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
/* lcd_ac_bias_en.lcd_ac_bias_en */
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
>;
};
leds_pins: pinmux_leds_pins {
guardian_led_pins: pinmux_guardian_led_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7) /* (T16) gpmc_a10.gpio1[26] */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
/* SPI0_CLK - spi0_clk.spi */
AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
/* SPI0_MOSI - spi0_d0.spi0 */
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
/* SPI0_MISO - spi0_d1.spi0 */
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
/* SPI0_CS0 - spi */
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
/* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
/* uart0_txd.uart0_txd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = <
/* K18 uart2_rxd.mirx_txd */
AM33XX_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE1)
/* L18 uart2_txd.mirx_rxd */
AM33XX_IOPAD(0x930, PIN_OUTPUT_PULLDOWN | MUX_MODE1)
>;
};
nandflash_pins: pinmux_nandflash_pins {
pinctrl-single,pins = <
/* (U7) gpmc_ad0.gpmc_ad0 */
AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
/* (V7) gpmc_ad1.gpmc_ad1 */
AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
/* (R8) gpmc_ad2.gpmc_ad2 */
AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
/* (T8) gpmc_ad3.gpmc_ad3 */
AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
/* (U8) gpmc_ad4.gpmc_ad4 */
AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
/* (V8) gpmc_ad5.gpmc_ad5 */
AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
/* (R9) gpmc_ad6.gpmc_ad6 */
AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
/* (T9) gpmc_ad7.gpmc_ad7 */
AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
/* (T17) gpmc_wait0.gpmc_wait0 */
AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
/* (U17) gpmc_wpn.gpmc_wpn */
AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
/* (V6) gpmc_csn0.gpmc_csn0 */
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
/* (R7) gpmc_advn_ale.gpmc_advn_ale */
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
/* (T7) gpmc_oen_ren.gpmc_oen_ren */
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
/* (U6) gpmc_wen.gpmc_wen */
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
/* (T6) gpmc_be0n_cle.gpmc_be0n_cle */
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
>;
};

373
arch/arm/boot/dts/am33xx-clocks.dtsi
View File

@@ -5,251 +5,288 @@
* Copyright (C) 2013 Texas Instruments, Inc.
*/
&scm_clocks {
sys_clkin_ck: sys_clkin_ck@40 {
sys_clkin_ck: clock-sys-clkin-22@40 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "sys_clkin_ck";
clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
ti,bit-shift = <22>;
reg = <0x0040>;
};
adc_tsc_fck: adc_tsc_fck {
adc_tsc_fck: clock-adc-tsc-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "adc_tsc_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
dcan0_fck: dcan0_fck {
dcan0_fck: clock-dcan0-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dcan0_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
dcan1_fck: dcan1_fck {
dcan1_fck: clock-dcan1-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dcan1_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
mcasp0_fck: mcasp0_fck {
mcasp0_fck: clock-mcasp0-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "mcasp0_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
mcasp1_fck: mcasp1_fck {
mcasp1_fck: clock-mcasp1-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "mcasp1_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
smartreflex0_fck: smartreflex0_fck {
smartreflex0_fck: clock-smartreflex0-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "smartreflex0_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
smartreflex1_fck: smartreflex1_fck {
smartreflex1_fck: clock-smartreflex1-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "smartreflex1_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
sha0_fck: sha0_fck {
sha0_fck: clock-sha0-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "sha0_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
aes0_fck: aes0_fck {
aes0_fck: clock-aes0-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "aes0_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
rng_fck: rng_fck {
rng_fck: clock-rng-fck {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "rng_fck";
clocks = <&sys_clkin_ck>;
clock-mult = <1>;
clock-div = <1>;
};
ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4ls_gclk>;
ti,bit-shift = <0>;
reg = <0x0664>;
};
clock@664 {
compatible = "ti,clksel";
reg = <0x664>;
#clock-cells = <2>;
#address-cells = <0>;
ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4ls_gclk>;
ti,bit-shift = <1>;
reg = <0x0664>;
};
ehrpwm0_tbclk: clock-ehrpwm0-tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "ehrpwm0_tbclk";
clocks = <&l4ls_gclk>;
ti,bit-shift = <0>;
};
ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&l4ls_gclk>;
ti,bit-shift = <2>;
reg = <0x0664>;
ehrpwm1_tbclk: clock-ehrpwm1-tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "ehrpwm1_tbclk";
clocks = <&l4ls_gclk>;
ti,bit-shift = <1>;
};
ehrpwm2_tbclk: clock-ehrpwm2-tbclk {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "ehrpwm2_tbclk";
clocks = <&l4ls_gclk>;
ti,bit-shift = <2>;
};
};
};
&prcm_clocks {
clk_32768_ck: clk_32768_ck {
clk_32768_ck: clock-clk-32768 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "clk_32768_ck";
clock-frequency = <32768>;
};
clk_rc32k_ck: clk_rc32k_ck {
clk_rc32k_ck: clock-clk-rc32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "clk_rc32k_ck";
clock-frequency = <32000>;
};
virt_19200000_ck: virt_19200000_ck {
virt_19200000_ck: clock-virt-19200000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "virt_19200000_ck";
clock-frequency = <19200000>;
};
virt_24000000_ck: virt_24000000_ck {
virt_24000000_ck: clock-virt-24000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "virt_24000000_ck";
clock-frequency = <24000000>;
};
virt_25000000_ck: virt_25000000_ck {
virt_25000000_ck: clock-virt-25000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "virt_25000000_ck";
clock-frequency = <25000000>;
};
virt_26000000_ck: virt_26000000_ck {
virt_26000000_ck: clock-virt-26000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "virt_26000000_ck";
clock-frequency = <26000000>;
};
tclkin_ck: tclkin_ck {
tclkin_ck: clock-tclkin {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-output-names = "tclkin_ck";
clock-frequency = <12000000>;
};
dpll_core_ck: dpll_core_ck@490 {
dpll_core_ck: clock@490 {
#clock-cells = <0>;
compatible = "ti,am3-dpll-core-clock";
clock-output-names = "dpll_core_ck";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0490>, <0x045c>, <0x0468>, <0x0460>, <0x0464>;
};
dpll_core_x2_ck: dpll_core_x2_ck {
dpll_core_x2_ck: clock-dpll-core-x2 {
#clock-cells = <0>;
compatible = "ti,am3-dpll-x2-clock";
clock-output-names = "dpll_core_x2_ck";
clocks = <&dpll_core_ck>;
};
dpll_core_m4_ck: dpll_core_m4_ck@480 {
dpll_core_m4_ck: clock-dpll-core-m4@480 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_core_m4_ck";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <31>;
reg = <0x0480>;
ti,index-starts-at-one;
};
dpll_core_m5_ck: dpll_core_m5_ck@484 {
dpll_core_m5_ck: clock-dpll-core-m5@484 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_core_m5_ck";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <31>;
reg = <0x0484>;
ti,index-starts-at-one;
};
dpll_core_m6_ck: dpll_core_m6_ck@4d8 {
dpll_core_m6_ck: clock-dpll-core-m6@4d8 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_core_m6_ck";
clocks = <&dpll_core_x2_ck>;
ti,max-div = <31>;
reg = <0x04d8>;
ti,index-starts-at-one;
};
dpll_mpu_ck: dpll_mpu_ck@488 {
dpll_mpu_ck: clock@488 {
#clock-cells = <0>;
compatible = "ti,am3-dpll-clock";
clock-output-names = "dpll_mpu_ck";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0488>, <0x0420>, <0x042c>, <0x0424>, <0x0428>;
};
dpll_mpu_m2_ck: dpll_mpu_m2_ck@4a8 {
dpll_mpu_m2_ck: clock-dpll-mpu-m2@4a8 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_mpu_m2_ck";
clocks = <&dpll_mpu_ck>;
ti,max-div = <31>;
reg = <0x04a8>;
ti,index-starts-at-one;
};
dpll_ddr_ck: dpll_ddr_ck@494 {
dpll_ddr_ck: clock@494 {
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clock-output-names = "dpll_ddr_ck";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0494>, <0x0434>, <0x0440>, <0x0438>, <0x043c>;
};
dpll_ddr_m2_ck: dpll_ddr_m2_ck@4a0 {
dpll_ddr_m2_ck: clock-dpll-ddr-m2@4a0 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_ddr_m2_ck";
clocks = <&dpll_ddr_ck>;
ti,max-div = <31>;
reg = <0x04a0>;
ti,index-starts-at-one;
};
dpll_ddr_m2_div2_ck: dpll_ddr_m2_div2_ck {
dpll_ddr_m2_div2_ck: clock-dpll-ddr-m2-div2 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dpll_ddr_m2_div2_ck";
clocks = <&dpll_ddr_m2_ck>;
clock-mult = <1>;
clock-div = <2>;
};
dpll_disp_ck: dpll_disp_ck@498 {
dpll_disp_ck: clock@498 {
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-clock";
clock-output-names = "dpll_disp_ck";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
};
dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 {
dpll_disp_m2_ck: clock-dpll-disp-m2@4a4 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_disp_m2_ck";
clocks = <&dpll_disp_ck>;
ti,max-div = <31>;
reg = <0x04a4>;
@@ -257,418 +294,484 @@ dpll_disp_m2_ck: dpll_disp_m2_ck@4a4 {
ti,set-rate-parent;
};
dpll_per_ck: dpll_per_ck@48c {
dpll_per_ck: clock@48c {
#clock-cells = <0>;
compatible = "ti,am3-dpll-no-gate-j-type-clock";
clock-output-names = "dpll_per_ck";
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
reg = <0x048c>, <0x0470>, <0x049c>, <0x0474>, <0x0478>;
};
dpll_per_m2_ck: dpll_per_m2_ck@4ac {
dpll_per_m2_ck: clock-dpll-per-m2@4ac {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "dpll_per_m2_ck";
clocks = <&dpll_per_ck>;
ti,max-div = <31>;
reg = <0x04ac>;
ti,index-starts-at-one;
};
dpll_per_m2_div4_wkupdm_ck: dpll_per_m2_div4_wkupdm_ck {
dpll_per_m2_div4_wkupdm_ck: clock-dpll-per-m2-div4-wkupdm {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dpll_per_m2_div4_wkupdm_ck";
clocks = <&dpll_per_m2_ck>;
clock-mult = <1>;
clock-div = <4>;
};
dpll_per_m2_div4_ck: dpll_per_m2_div4_ck {
dpll_per_m2_div4_ck: clock-dpll-per-m2-div4 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dpll_per_m2_div4_ck";
clocks = <&dpll_per_m2_ck>;
clock-mult = <1>;
clock-div = <4>;
};
clk_24mhz: clk_24mhz {
clk_24mhz: clock-clk-24mhz {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "clk_24mhz";
clocks = <&dpll_per_m2_ck>;
clock-mult = <1>;
clock-div = <8>;
};
clkdiv32k_ck: clkdiv32k_ck {
clkdiv32k_ck: clock-clkdiv32k {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "clkdiv32k_ck";
clocks = <&clk_24mhz>;
clock-mult = <1>;
clock-div = <732>;
};
l3_gclk: l3_gclk {
l3_gclk: clock-l3-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l3_gclk";
clocks = <&dpll_core_m4_ck>;
clock-mult = <1>;
clock-div = <1>;
};
pruss_ocp_gclk: pruss_ocp_gclk@530 {
pruss_ocp_gclk: clock-pruss-ocp-gclk@530 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "pruss_ocp_gclk";
clocks = <&l3_gclk>, <&dpll_disp_m2_ck>;
reg = <0x0530>;
};
mmu_fck: mmu_fck@914 {
mmu_fck: clock-mmu-fck-1@914 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "mmu_fck";
clocks = <&dpll_core_m4_ck>;
ti,bit-shift = <1>;
reg = <0x0914>;
};
timer1_fck: timer1_fck@528 {
timer1_fck: clock-timer1-fck@528 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer1_fck";
clocks = <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>, <&tclkin_ck>, <&clk_rc32k_ck>, <&clk_32768_ck>;
reg = <0x0528>;
};
timer2_fck: timer2_fck@508 {
timer2_fck: clock-timer2-fck@508 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer2_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0508>;
};
timer3_fck: timer3_fck@50c {
timer3_fck: clock-timer3-fck@50c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer3_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x050c>;
};
timer4_fck: timer4_fck@510 {
timer4_fck: clock-timer4-fck@510 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer4_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0510>;
};
timer5_fck: timer5_fck@518 {
timer5_fck: clock-timer5-fck@518 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer5_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0518>;
};
timer6_fck: timer6_fck@51c {
timer6_fck: clock-timer6-fck@51c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer6_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x051c>;
};
timer7_fck: timer7_fck@504 {
timer7_fck: clock-timer7-fck@504 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "timer7_fck";
clocks = <&tclkin_ck>, <&sys_clkin_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0504>;
};
usbotg_fck: usbotg_fck@47c {
usbotg_fck: clock-usbotg-fck-8@47c {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "usbotg_fck";
clocks = <&dpll_per_ck>;
ti,bit-shift = <8>;
reg = <0x047c>;
};
dpll_core_m4_div2_ck: dpll_core_m4_div2_ck {
dpll_core_m4_div2_ck: clock-dpll-core-m4-div2 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "dpll_core_m4_div2_ck";
clocks = <&dpll_core_m4_ck>;
clock-mult = <1>;
clock-div = <2>;
};
ieee5000_fck: ieee5000_fck@e4 {
ieee5000_fck: clock-ieee5000-fck-1@e4 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "ieee5000_fck";
clocks = <&dpll_core_m4_div2_ck>;
ti,bit-shift = <1>;
reg = <0x00e4>;
};
wdt1_fck: wdt1_fck@538 {
wdt1_fck: clock-wdt1-fck@538 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "wdt1_fck";
clocks = <&clk_rc32k_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x0538>;
};
l4_rtc_gclk: l4_rtc_gclk {
l4_rtc_gclk: clock-l4-rtc-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l4_rtc_gclk";
clocks = <&dpll_core_m4_ck>;
clock-mult = <1>;
clock-div = <2>;
};
l4hs_gclk: l4hs_gclk {
l4hs_gclk: clock-l4hs-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l4hs_gclk";
clocks = <&dpll_core_m4_ck>;
clock-mult = <1>;
clock-div = <1>;
};
l3s_gclk: l3s_gclk {
l3s_gclk: clock-l3s-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l3s_gclk";
clocks = <&dpll_core_m4_div2_ck>;
clock-mult = <1>;
clock-div = <1>;
};
l4fw_gclk: l4fw_gclk {
l4fw_gclk: clock-l4fw-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l4fw_gclk";
clocks = <&dpll_core_m4_div2_ck>;
clock-mult = <1>;
clock-div = <1>;
};
l4ls_gclk: l4ls_gclk {
l4ls_gclk: clock-l4ls-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "l4ls_gclk";
clocks = <&dpll_core_m4_div2_ck>;
clock-mult = <1>;
clock-div = <1>;
};
sysclk_div_ck: sysclk_div_ck {
sysclk_div_ck: clock-sysclk-div {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "sysclk_div_ck";
clocks = <&dpll_core_m4_ck>;
clock-mult = <1>;
clock-div = <1>;
};
cpsw_125mhz_gclk: cpsw_125mhz_gclk {
cpsw_125mhz_gclk: clock-cpsw-125mhz-gclk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "cpsw_125mhz_gclk";
clocks = <&dpll_core_m5_ck>;
clock-mult = <1>;
clock-div = <2>;
};
cpsw_cpts_rft_clk: cpsw_cpts_rft_clk@520 {
cpsw_cpts_rft_clk: clock-cpsw-cpts-rft@520 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "cpsw_cpts_rft_clk";
clocks = <&dpll_core_m5_ck>, <&dpll_core_m4_ck>;
reg = <0x0520>;
};
gpio0_dbclk_mux_ck: gpio0_dbclk_mux_ck@53c {
gpio0_dbclk_mux_ck: clock-gpio0-dbclk-mux@53c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "gpio0_dbclk_mux_ck";
clocks = <&clk_rc32k_ck>, <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
reg = <0x053c>;
};
lcd_gclk: lcd_gclk@534 {
lcd_gclk: clock-lcd-gclk@534 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "lcd_gclk";
clocks = <&dpll_disp_m2_ck>, <&dpll_core_m5_ck>, <&dpll_per_m2_ck>;
reg = <0x0534>;
ti,set-rate-parent;
};
mmc_clk: mmc_clk {
mmc_clk: clock-mmc {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-output-names = "mmc_clk";
clocks = <&dpll_per_m2_ck>;
clock-mult = <1>;
clock-div = <2>;
};
gfx_fclk_clksel_ck: gfx_fclk_clksel_ck@52c {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
ti,bit-shift = <1>;
reg = <0x052c>;
clock@52c {
compatible = "ti,clksel";
reg = <0x52c>;
#clock-cells = <2>;
#address-cells = <0>;
gfx_fclk_clksel_ck: clock-gfx-fclk-clksel {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "gfx_fclk_clksel_ck";
clocks = <&dpll_core_m4_ck>, <&dpll_per_m2_ck>;
ti,bit-shift = <1>;
};
gfx_fck_div_ck: clock-gfx-fck-div {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "gfx_fck_div_ck";
clocks = <&gfx_fclk_clksel_ck>;
ti,max-div = <2>;
};
};
gfx_fck_div_ck: gfx_fck_div_ck@52c {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&gfx_fclk_clksel_ck>;
reg = <0x052c>;
ti,max-div = <2>;
};
clock@700 {
compatible = "ti,clksel";
reg = <0x700>;
#clock-cells = <2>;
#address-cells = <0>;
sysclkout_pre_ck: sysclkout_pre_ck@700 {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
reg = <0x0700>;
};
sysclkout_pre_ck: clock-sysclkout-pre {
#clock-cells = <0>;
compatible = "ti,mux-clock";
clock-output-names = "sysclkout_pre_ck";
clocks = <&clk_32768_ck>, <&l3_gclk>, <&dpll_ddr_m2_ck>, <&dpll_per_m2_ck>, <&lcd_gclk>;
};
clkout2_div_ck: clkout2_div_ck@700 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clocks = <&sysclkout_pre_ck>;
ti,bit-shift = <3>;
ti,max-div = <8>;
reg = <0x0700>;
};
clkout2_div_ck: clock-clkout2-div {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "clkout2_div_ck";
clocks = <&sysclkout_pre_ck>;
ti,bit-shift = <3>;
ti,max-div = <8>;
};
clkout2_ck: clkout2_ck@700 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clocks = <&clkout2_div_ck>;
ti,bit-shift = <7>;
reg = <0x0700>;
clkout2_ck: clock-clkout2 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "clkout2_ck";
clocks = <&clkout2_div_ck>;
ti,bit-shift = <7>;
};
};
};
&prcm {
per_cm: per-cm@0 {
per_cm: clock@0 {
compatible = "ti,omap4-cm";
clock-output-names = "per_cm";
reg = <0x0 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x0 0x400>;
l4ls_clkctrl: l4ls-clkctrl@38 {
l4ls_clkctrl: clock@38 {
compatible = "ti,clkctrl";
clock-output-names = "l4ls_clkctrl";
reg = <0x38 0x2c>, <0x6c 0x28>, <0xac 0xc>, <0xc0 0x1c>, <0xec 0xc>, <0x10c 0x8>, <0x130 0x4>;
#clock-cells = <2>;
};
l3s_clkctrl: l3s-clkctrl@1c {
l3s_clkctrl: clock@1c {
compatible = "ti,clkctrl";
clock-output-names = "l3s_clkctrl";
reg = <0x1c 0x4>, <0x30 0x8>, <0x68 0x4>, <0xf8 0x4>;
#clock-cells = <2>;
};
l3_clkctrl: l3-clkctrl@24 {
l3_clkctrl: clock@24 {
compatible = "ti,clkctrl";
clock-output-names = "l3_clkctrl";
reg = <0x24 0xc>, <0x94 0x10>, <0xbc 0x4>, <0xdc 0x8>, <0xfc 0x8>;
#clock-cells = <2>;
};
l4hs_clkctrl: l4hs-clkctrl@120 {
l4hs_clkctrl: clock@120 {
compatible = "ti,clkctrl";
clock-output-names = "l4hs_clkctrl";
reg = <0x120 0x4>;
#clock-cells = <2>;
};
pruss_ocp_clkctrl: pruss-ocp-clkctrl@e8 {
pruss_ocp_clkctrl: clock@e8 {
compatible = "ti,clkctrl";
clock-output-names = "pruss_ocp_clkctrl";
reg = <0xe8 0x4>;
#clock-cells = <2>;
};
cpsw_125mhz_clkctrl: cpsw-125mhz-clkctrl@0 {
cpsw_125mhz_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "cpsw_125mhz_clkctrl";
reg = <0x0 0x18>;
#clock-cells = <2>;
};
lcdc_clkctrl: lcdc-clkctrl@18 {
lcdc_clkctrl: clock@18 {
compatible = "ti,clkctrl";
clock-output-names = "lcdc_clkctrl";
reg = <0x18 0x4>;
#clock-cells = <2>;
};
clk_24mhz_clkctrl: clk-24mhz-clkctrl@14c {
clk_24mhz_clkctrl: clock@14c {
compatible = "ti,clkctrl";
clock-output-names = "clk_24mhz_clkctrl";
reg = <0x14c 0x4>;
#clock-cells = <2>;
};
};
wkup_cm: wkup-cm@400 {
wkup_cm: clock@400 {
compatible = "ti,omap4-cm";
clock-output-names = "wkup_cm";
reg = <0x400 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x400 0x100>;
l4_wkup_clkctrl: l4-wkup-clkctrl@0 {
l4_wkup_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "l4_wkup_clkctrl";
reg = <0x0 0x10>, <0xb4 0x24>;
#clock-cells = <2>;
};
l3_aon_clkctrl: l3-aon-clkctrl@14 {
l3_aon_clkctrl: clock@14 {
compatible = "ti,clkctrl";
clock-output-names = "l3_aon_clkctrl";
reg = <0x14 0x4>;
#clock-cells = <2>;
};
l4_wkup_aon_clkctrl: l4-wkup-aon-clkctrl@b0 {
l4_wkup_aon_clkctrl: clock@b0 {
compatible = "ti,clkctrl";
clock-output-names = "l4_wkup_aon_clkctrl";
reg = <0xb0 0x4>;
#clock-cells = <2>;
};
};
mpu_cm: mpu-cm@600 {
mpu_cm: clock@600 {
compatible = "ti,omap4-cm";
clock-output-names = "mpu_cm";
reg = <0x600 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x600 0x100>;
mpu_clkctrl: mpu-clkctrl@0 {
mpu_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "mpu_clkctrl";
reg = <0x0 0x8>;
#clock-cells = <2>;
};
};
l4_rtc_cm: l4-rtc-cm@800 {
l4_rtc_cm: clock@800 {
compatible = "ti,omap4-cm";
clock-output-names = "l4_rtc_cm";
reg = <0x800 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x800 0x100>;
l4_rtc_clkctrl: l4-rtc-clkctrl@0 {
l4_rtc_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "l4_rtc_clkctrl";
reg = <0x0 0x4>;
#clock-cells = <2>;
};
};
gfx_l3_cm: gfx-l3-cm@900 {
gfx_l3_cm: clock@900 {
compatible = "ti,omap4-cm";
clock-output-names = "gfx_l3_cm";
reg = <0x900 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x900 0x100>;
gfx_l3_clkctrl: gfx-l3-clkctrl@0 {
gfx_l3_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "gfx_l3_clkctrl";
reg = <0x0 0x8>;
#clock-cells = <2>;
};
};
l4_cefuse_cm: l4-cefuse-cm@a00 {
l4_cefuse_cm: clock@a00 {
compatible = "ti,omap4-cm";
clock-output-names = "l4_cefuse_cm";
reg = <0xa00 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0xa00 0x100>;
l4_cefuse_clkctrl: l4-cefuse-clkctrl@0 {
l4_cefuse_clkctrl: clock@0 {
compatible = "ti,clkctrl";
clock-output-names = "l4_cefuse_clkctrl";
reg = <0x0 0x24>;
#clock-cells = <2>;
};

339
arch/arm/boot/dts/am43xx-clocks.dtsi
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File diff suppressed because it is too large Load Diff

693
arch/arm/boot/dts/dra7xx-clocks.dtsi
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File diff suppressed because it is too large Load Diff

10
arch/arm/boot/dts/logicpd-som-lv.dtsi
View File

@@ -27,6 +27,8 @@ wl12xx_vmmc: wl12xx_vmmc {
/* HS USB Host PHY on PORT 1 */
hsusb2_phy: hsusb2_phy {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_reset_pin>;
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
#phy-cells = <0>;
@@ -144,6 +146,8 @@ wlcore: wlcore@2 {
};
&usbhshost {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_pins>;
port2-mode = "ehci-phy";
};
@@ -151,10 +155,7 @@ &usbhsehci {
phys = <0 &hsusb2_phy>;
};
&omap3_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_pins>;
mmc3_pins: pinmux_mm3_pins {
pinctrl-single,pins = <
@@ -250,8 +251,7 @@ OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
};
&omap3_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <&hsusb2_reset_pin>;
hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */

2
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@@ -370,7 +370,7 @@ hub@2 {
#address-cells = <1>;
#size-cells = <0>;
ethernet: usbether@1 {
ethernet: ethernet@1 {
compatible = "usb424,ec00";
reg = <1>;
};

2
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@@ -558,7 +558,7 @@ hub@1 {
#address-cells = <1>;
#size-cells = <0>;
ethernet: usbether@1 {
ethernet: ethernet@1 {
compatible = "usb424,ec00";
reg = <1>;
};

1
arch/arm/boot/dts/omap443x-clocks.dtsi
View File

@@ -8,6 +8,7 @@ &prm_clocks {
bandgap_fclk: bandgap_fclk@1888 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "bandgap_fclk";
clocks = <&sys_32k_ck>;
ti,bit-shift = <8>;
reg = <0x1888>;

2
arch/arm/boot/dts/omap446x-clocks.dtsi
View File

@@ -8,6 +8,7 @@ &prm_clocks {
div_ts_ck: div_ts_ck@1888 {
#clock-cells = <0>;
compatible = "ti,divider-clock";
clock-output-names = "div_ts_ck";
clocks = <&l4_wkup_clk_mux_ck>;
ti,bit-shift = <24>;
reg = <0x1888>;
@@ -17,6 +18,7 @@ div_ts_ck: div_ts_ck@1888 {
bandgap_ts_fclk: bandgap_ts_fclk@1888 {
#clock-cells = <0>;
compatible = "ti,gate-clock";
clock-output-names = "bandgap_ts_fclk";
clocks = <&div_ts_ck>;
ti,bit-shift = <8>;
reg = <0x1888>;

173
arch/arm/boot/dts/omap44xx-clocks.dtsi
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2
arch/arm/boot/dts/omap5-igep0050.dts
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@@ -128,7 +128,7 @@ hub@2 {
#address-cells = <1>;
#size-cells = <0>;
ethernet: usbether@3 {
ethernet: ethernet@3 {
compatible = "usb424,7500";
reg = <3>;
};

2
arch/arm/boot/dts/omap5-uevm.dts
View File

@@ -209,7 +209,7 @@ hub@2 {
#size-cells = <0>;
};
ethernet: usbether@3 {
ethernet: ethernet@3 {
compatible = "usb424,9730";
reg = <3>;
};

160
arch/arm/boot/dts/omap54xx-clocks.dtsi
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2
drivers/iommu/omap-iommu.c
View File

@@ -1661,7 +1661,7 @@ static struct iommu_device *omap_iommu_probe_device(struct device *dev)
num_iommus = of_property_count_elems_of_size(dev->of_node, "iommus",
sizeof(phandle));
if (num_iommus < 0)
return 0;
return ERR_PTR(-ENODEV);
arch_data = kcalloc(num_iommus + 1, sizeof(*arch_data), GFP_KERNEL);
if (!arch_data)