spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfers

Repacking multiple smaller words into larger ones to make use of the
full FIFO doesn't save anything in DMA mode, so don't bother doing it.

Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-8-bea884630cfb@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Larisa Grigore
2025-05-22 15:51:37 +01:00
committed by Mark Brown
parent e7397e4d3b
commit cac7e50541

View File

@@ -850,8 +850,12 @@ static void dspi_setup_accel(struct fsl_dspi *dspi)
struct spi_transfer *xfer = dspi->cur_transfer;
bool odd = !!(dspi->len & 1);
/* No accel for frames not multiple of 8 bits at the moment */
if (xfer->bits_per_word % 8)
/*
* No accel for DMA transfers or frames not multiples of 8 bits at the
* moment.
*/
if (dspi->devtype_data->trans_mode == DSPI_DMA_MODE ||
xfer->bits_per_word % 8)
goto no_accel;
if (!odd && dspi->len <= dspi->devtype_data->fifo_size * 2) {
@@ -860,10 +864,7 @@ static void dspi_setup_accel(struct fsl_dspi *dspi)
dspi->oper_bits_per_word = 8;
} else {
/* Start off with maximum supported by hardware */
if (dspi->devtype_data->trans_mode == DSPI_XSPI_MODE)
dspi->oper_bits_per_word = 32;
else
dspi->oper_bits_per_word = 16;
dspi->oper_bits_per_word = 32;
/*
* And go down only if the buffer can't be sent with