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Merge tag 'samsung-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

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Samsung DTS ARM changes for v5.19, part two

1. Cleanups: unused and undocumented dma-channels and dma-requests.
2. Correct compatible of Samsung EEPROM on S5PV210.

* tag 'samsung-dt-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: exynos: drop useless 'dma-channels/requests' properties
  ARM: dts: s5pv210: drop useless 'dma-channels/requests' properties
  ARM: dts: exynos: add atmel,24c128 fallback to Samsung EEPROM

Link: https://lore.kernel.org/r/20220506081438.149192-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2022-05-06 22:24:51 +02:00
parent 6e4c9b1fc5 d414b7a3f3
commit c86071e890
8 changed files with 2 additions and 42 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/exynos3250.dtsi
View File

@@ -429,8 +429,6 @@ pdma0: dma-controller@12680000 {
clocks = <&cmu CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -440,8 +438,6 @@ pdma1: dma-controller@12690000 {
clocks = <&cmu CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
adc: adc@126c0000 {

6
arch/arm/boot/dts/exynos4.dtsi
View File

@@ -676,8 +676,6 @@ pdma0: dma-controller@12680000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@12690000 {
@@ -687,8 +685,6 @@ pdma1: dma-controller@12690000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma1: dma-controller@12850000 {
@@ -698,8 +694,6 @@ mdma1: dma-controller@12850000 {
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
fimd: fimd@11c00000 {

2
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@@ -666,8 +666,6 @@ mdma0: dma-controller@12840000 {
clocks = <&clock CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
power-domains = <&pd_lcd0>;
};
};

4
arch/arm/boot/dts/exynos5250-smdk5250.dts
View File

@@ -129,7 +129,7 @@ &i2c_0 {
samsung,i2c-max-bus-freq = <20000>;
eeprom@50 {
compatible = "samsung,s524ad0xd1";
compatible = "samsung,s524ad0xd1", "atmel,24c128";
reg = <0x50>;
};
@@ -289,7 +289,7 @@ &i2c_1 {
samsung,i2c-max-bus-freq = <20000>;
eeprom@51 {
compatible = "samsung,s524ad0xd1";
compatible = "samsung,s524ad0xd1", "atmel,24c128";
reg = <0x51>;
};

8
arch/arm/boot/dts/exynos5250.dtsi
View File

@@ -700,8 +700,6 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -711,8 +709,6 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -722,8 +718,6 @@ mdma0: dma-controller@10800000 {
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -733,8 +727,6 @@ mdma1: dma-controller@11c10000 {
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
gsc_0: gsc@13e00000 {

4
arch/arm/boot/dts/exynos5410.dtsi
View File

@@ -196,8 +196,6 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -207,8 +205,6 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
audi2s0: i2s@3830000 {

10
arch/arm/boot/dts/exynos5420.dtsi
View File

@@ -437,8 +437,6 @@ adma: dma-controller@3880000 {
clocks = <&clock_audss EXYNOS_ADMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <6>;
#dma-requests = <16>;
power-domains = <&mau_pd>;
};
@@ -449,8 +447,6 @@ pdma0: dma-controller@121a0000 {
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@121b0000 {
@@ -460,8 +456,6 @@ pdma1: dma-controller@121b0000 {
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
mdma0: dma-controller@10800000 {
@@ -471,8 +465,6 @@ mdma0: dma-controller@10800000 {
clocks = <&clock CLK_MDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
mdma1: dma-controller@11c10000 {
@@ -482,8 +474,6 @@ mdma1: dma-controller@11c10000 {
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
/*
* MDMA1 can support both secure and non-secure
* AXI transactions. When this is enabled in

6
arch/arm/boot/dts/s5pv210.dtsi
View File

@@ -125,8 +125,6 @@ pdma0: dma-controller@e0900000 {
clocks = <&clocks CLK_PDMA0>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
pdma1: dma-controller@e0a00000 {
@@ -137,8 +135,6 @@ pdma1: dma-controller@e0a00000 {
clocks = <&clocks CLK_PDMA1>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <32>;
};
adc: adc@e1700000 {
@@ -526,8 +522,6 @@ mdma1: dma-controller@fa200000 {
clocks = <&clocks CLK_MDMA>;
clock-names = "apb_pclk";
#dma-cells = <1>;
#dma-channels = <8>;
#dma-requests = <1>;
};
rotator: rotator@fa300000 {