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clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc

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Fix typo pll5_mux_dsi_div_params -> mux_dsi_div_params

Fixes the below warning (make W=1):

    drivers/clk/renesas/rzg2l-cpg.c:115: warning: Function parameter or member 'mux_dsi_div_params' not described in 'rzg2l_cpg_priv'

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20221026012123.159790-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar
2022-10-26 02:21:23 +01:00
committed by Geert Uytterhoeven
parent db7076d5a7
commit c82009584e
1 changed files with 1 additions and 1 deletions
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drivers/clk/renesas/rzg2l-cpg.c
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@@ -95,7 +95,7 @@ struct rzg2l_pll5_mux_dsi_div_param {
* @num_resets: Number of Module Resets in info->resets[]
* @last_dt_core_clk: ID of the last Core Clock exported to DT
* @info: Pointer to platform data
* @pll5_mux_dsi_div_params: pll5 mux and dsi div parameters
* @mux_dsi_div_params: pll5 mux and dsi div parameters
*/
struct rzg2l_cpg_priv {
struct reset_controller_dev rcdev;