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ARM: dts: aspeed: Modify I2C bus configuration

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Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U
mainboard.

Additionally adds a descriptive comment to I2C busses 1 and 5.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Renze Nicolai
2024-04-03 15:28:53 +02:00
committed by Andrew Jeffery
parent 62429c485a
commit c61838aa45
1 changed files with 7 additions and 0 deletions
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7
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-x570d4u.dts
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@@ -162,6 +162,7 @@ &i2c0 {
};
&i2c1 {
/* Hardware monitoring SMBus */
status = "okay";
w83773g@4c {
@@ -219,6 +220,7 @@ i2c4mux0ch3: i2c@3 {
};
&i2c5 {
/* SMBus on BMC connector (BMC_SMB_1) */
status = "okay";
};
@@ -243,6 +245,11 @@ eth1_macaddress: macaddress@3f88 {
};
};
&i2c8 {
/* SMBus on intelligent platform management bus header (IPMB_1) */
status = "okay";
};
&gfx {
status = "okay";
};