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Merge tag 'du-fixes-20181126' of git://linuxtv.org/pinchartl/media into drm-fixes
R-Car DU v4.20 regression fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/8134504.ZSXK7gKU4H@avalon
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@@ -202,10 +202,25 @@ void rcar_du_group_put(struct rcar_du_group *rgrp)
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static void __rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start)
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{
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struct rcar_du_crtc *rcrtc = &rgrp->dev->crtcs[rgrp->index * 2];
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struct rcar_du_device *rcdu = rgrp->dev;
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rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_DRES | DSYSR_DEN,
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start ? DSYSR_DEN : DSYSR_DRES);
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/*
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* Group start/stop is controlled by the DRES and DEN bits of DSYSR0
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* for the first group and DSYSR2 for the second group. On most DU
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* instances, this maps to the first CRTC of the group, and we can just
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* use rcar_du_crtc_dsysr_clr_set() to access the correct DSYSR. On
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* M3-N, however, DU2 doesn't exist, but DSYSR2 does. We thus need to
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* access the register directly using group read/write.
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*/
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if (rcdu->info->channels_mask & BIT(rgrp->index * 2)) {
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struct rcar_du_crtc *rcrtc = &rgrp->dev->crtcs[rgrp->index * 2];
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rcar_du_crtc_dsysr_clr_set(rcrtc, DSYSR_DRES | DSYSR_DEN,
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start ? DSYSR_DEN : DSYSR_DRES);
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} else {
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rcar_du_group_write(rgrp, DSYSR,
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start ? DSYSR_DEN : DSYSR_DRES);
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}
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}
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void rcar_du_group_start_stop(struct rcar_du_group *rgrp, bool start)
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