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drm/nouveau/gr/tu102-: fix support for sw_bundle64_init

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We weren't sending the high bits, though they're zero currently anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
2022-06-01 20:48:21 +10:00
parent 1cd97b5490
commit c4d66f7db6
5 changed files with 17 additions and 6 deletions
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8
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
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@@ -1389,9 +1389,15 @@ gf100_grctx_generate_main(struct gf100_gr_chan *chan)
if (gr->bundle_veid)
gf100_gr_icmd(gr, gr->bundle_veid);
if (grctx->sw_veid_bundle_init)
else
gf100_gr_icmd(gr, grctx->sw_veid_bundle_init);
if (gr->bundle64)
gf100_gr_icmd(gr, gr->bundle64);
else
if (grctx->sw_bundle64_init)
gf100_gr_icmd(gr, grctx->sw_bundle64_init);
if (grctx->r400088) grctx->r400088(gr, true);
nvkm_wr32(device, 0x404154, idle_timeout);

1
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h
View File

@@ -22,6 +22,7 @@ struct gf100_grctx_func {
const struct gf100_gr_pack *icmd;
const struct gf100_gr_pack *mthd;
const struct gf100_gr_pack *sw_veid_bundle_init;
const struct gf100_gr_pack *sw_bundle64_init;
/* bundle circular buffer */
void (*bundle)(struct gf100_gr_chan *, u64 addr, u32 size);
u32 bundle_size;

6
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxtu102.c
View File

@@ -50,8 +50,8 @@ tu102_grctx_init_unknown_bundle_init_0[] = {
};
static const struct gf100_gr_pack
tu102_grctx_pack_sw_veid_bundle_init[] = {
{ tu102_grctx_init_unknown_bundle_init_0 },
tu102_grctx_pack_sw_bundle64_init[] = {
{ tu102_grctx_init_unknown_bundle_init_0, .type = 64 },
{}
};
@@ -69,7 +69,7 @@ tu102_grctx = {
.unkn88c = gv100_grctx_unkn88c,
.main = gf100_grctx_generate_main,
.unkn = gv100_grctx_generate_unkn,
.sw_veid_bundle_init = tu102_grctx_pack_sw_veid_bundle_init,
.sw_bundle64_init = tu102_grctx_pack_sw_bundle64_init,
.bundle = gm107_grctx_generate_bundle,
.bundle_size = 0x3000,
.bundle_min_gpm_fifo_depth = 0x180,

5
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
View File

@@ -1097,7 +1097,7 @@ gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p)
struct nvkm_device *device = gr->base.engine.subdev.device;
const struct gf100_gr_pack *pack;
const struct gf100_gr_init *init;
u32 data = 0;
u64 data = 0;
nvkm_wr32(device, 0x400208, 0x80000000);
@@ -1107,6 +1107,8 @@ gf100_gr_icmd(struct gf100_gr *gr, const struct gf100_gr_pack *p)
if ((pack == p && init == p->init) || data != init->data) {
nvkm_wr32(device, 0x400204, init->data);
if (pack->type == 64)
nvkm_wr32(device, 0x40020c, upper_32_bits(init->data));
data = init->data;
}
@@ -2139,6 +2141,7 @@ gf100_gr_dtor(struct nvkm_gr *base)
nvkm_blob_dtor(&gr->gpccs.inst);
nvkm_blob_dtor(&gr->gpccs.data);
vfree(gr->bundle64);
vfree(gr->bundle_veid);
vfree(gr->bundle);
vfree(gr->method);

3
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
View File

@@ -91,6 +91,7 @@ struct gf100_gr {
struct gf100_gr_pack *sw_ctx;
struct gf100_gr_pack *bundle;
struct gf100_gr_pack *bundle_veid;
struct gf100_gr_pack *bundle64;
struct gf100_gr_pack *method;
struct gf100_gr_zbc_color zbc_color[NVKM_LTC_MAX_ZBC_COLOR_CNT];
@@ -286,7 +287,7 @@ struct gf100_gr_init {
u32 addr;
u8 count;
u32 pitch;
u32 data;
u64 data;
};
struct gf100_gr_pack {