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arm64: dts: allwinner: a100: add usb related nodes

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The Allwinner A100 has two HCI USB controllers, a OTG controller and a
USB PHY. The PHY is compatible with that used by the D1, while the OTG
controller is compatible with the A33. Add nodes for these to the base
DTSI.

Signed-off-by: Yangtao Li <frank@allwinnertech.com>
[masterr3c0rd@epochal.quest: fallback to a33-musb and d1-usb-phy, edited message]
Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Parthiban Nallathambi <parthiban@linumiz.com>
Link: https://patch.msgid.link/20241031070232.1793078-7-masterr3c0rd@epochal.quest
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This commit is contained in:
Yangtao Li
2024-10-31 04:02:19 -03:00
committed by Chen-Yu Tsai
parent e144e89de0
commit c3cc9b02f7
1 changed files with 91 additions and 0 deletions
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91
arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
View File

@@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 {
#thermal-sensor-cells = <1>;
};
usb_otg: usb@5100000 {
compatible = "allwinner,sun50i-a100-musb",
"allwinner,sun8i-a33-musb";
reg = <0x05100000 0x0400>;
clocks = <&ccu CLK_BUS_OTG>;
resets = <&ccu RST_BUS_OTG>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
status = "disabled";
};
usbphy: phy@5100400 {
compatible = "allwinner,sun50i-a100-usb-phy",
"allwinner,sun20i-d1-usb-phy";
reg = <0x05100400 0x100>,
<0x05101800 0x100>,
<0x05200800 0x100>;
reg-names = "phy_ctrl",
"pmu0",
"pmu1";
clocks = <&ccu CLK_USB_PHY0>,
<&ccu CLK_USB_PHY1>;
clock-names = "usb0_phy",
"usb1_phy";
resets = <&ccu RST_USB_PHY0>,
<&ccu RST_USB_PHY1>;
reset-names = "usb0_reset",
"usb1_reset";
status = "disabled";
#phy-cells = <1>;
};
ehci0: usb@5101000 {
compatible = "allwinner,sun50i-a100-ehci",
"generic-ehci";
reg = <0x05101000 0x100>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_BUS_EHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@5101400 {
compatible = "allwinner,sun50i-a100-ohci",
"generic-ohci";
reg = <0x05101400 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
ehci1: usb@5200000 {
compatible = "allwinner,sun50i-a100-ehci",
"generic-ehci";
reg = <0x05200000 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI1>,
<&ccu CLK_BUS_EHCI1>,
<&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_OHCI1>,
<&ccu RST_BUS_EHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@5200400 {
compatible = "allwinner,sun50i-a100-ohci",
"generic-ohci";
reg = <0x05200400 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_OHCI1>,
<&ccu CLK_USB_OHCI1>;
resets = <&ccu RST_BUS_OHCI1>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
r_ccu: clock@7010000 {
compatible = "allwinner,sun50i-a100-r-ccu";
reg = <0x07010000 0x300>;