Merge branch 'ionic-minor-code-updates'

Shannon Nelson says:

====================
ionic: minor code updates

These are a few updates to the ionic driver, mostly for handling
newer/faster QSFP connectors.
====================

Link: https://patch.msgid.link/20241210183045.67878-1-shannon.nelson@amd.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Paolo Abeni
2024-12-12 12:06:35 +01:00
5 changed files with 63 additions and 6 deletions

View File

@@ -18,8 +18,6 @@ struct ionic_lif;
#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF 0x1002
#define PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF 0x1003
#define IONIC_ASIC_TYPE_ELBA 2
#define DEVCMD_TIMEOUT 5
#define IONIC_ADMINQ_TIME_SLICE msecs_to_jiffies(100)

View File

@@ -158,6 +158,20 @@ static int ionic_get_link_ksettings(struct net_device *netdev,
25000baseCR_Full);
copper_seen++;
break;
case IONIC_XCVR_PID_QSFP_50G_CR2_FC:
case IONIC_XCVR_PID_QSFP_50G_CR2:
ethtool_link_ksettings_add_link_mode(ks, supported,
50000baseCR2_Full);
copper_seen++;
break;
case IONIC_XCVR_PID_QSFP_200G_CR4:
ethtool_link_ksettings_add_link_mode(ks, supported, 200000baseCR4_Full);
copper_seen++;
break;
case IONIC_XCVR_PID_QSFP_400G_CR4:
ethtool_link_ksettings_add_link_mode(ks, supported, 400000baseCR4_Full);
copper_seen++;
break;
case IONIC_XCVR_PID_SFP_10GBASE_AOC:
case IONIC_XCVR_PID_SFP_10GBASE_CU:
ethtool_link_ksettings_add_link_mode(ks, supported,
@@ -196,6 +210,31 @@ static int ionic_get_link_ksettings(struct net_device *netdev,
ethtool_link_ksettings_add_link_mode(ks, supported,
25000baseSR_Full);
break;
case IONIC_XCVR_PID_QSFP_200G_AOC:
case IONIC_XCVR_PID_QSFP_200G_SR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
200000baseSR4_Full);
break;
case IONIC_XCVR_PID_QSFP_200G_FR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
200000baseLR4_ER4_FR4_Full);
break;
case IONIC_XCVR_PID_QSFP_200G_DR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
200000baseDR4_Full);
break;
case IONIC_XCVR_PID_QSFP_400G_FR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
400000baseLR4_ER4_FR4_Full);
break;
case IONIC_XCVR_PID_QSFP_400G_DR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
400000baseDR4_Full);
break;
case IONIC_XCVR_PID_QSFP_400G_SR4:
ethtool_link_ksettings_add_link_mode(ks, supported,
400000baseSR4_Full);
break;
case IONIC_XCVR_PID_SFP_10GBASE_SR:
ethtool_link_ksettings_add_link_mode(ks, supported,
10000baseSR_Full);
@@ -929,6 +968,7 @@ static int ionic_get_module_info(struct net_device *netdev,
break;
case SFF8024_ID_QSFP_8436_8636:
case SFF8024_ID_QSFP28_8636:
case SFF8024_ID_QSFP_PLUS_CMIS:
modinfo->type = ETH_MODULE_SFF_8436;
modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
break;

View File

@@ -1277,7 +1277,10 @@ enum ionic_xcvr_pid {
IONIC_XCVR_PID_SFP_25GBASE_CR_S = 3,
IONIC_XCVR_PID_SFP_25GBASE_CR_L = 4,
IONIC_XCVR_PID_SFP_25GBASE_CR_N = 5,
IONIC_XCVR_PID_QSFP_50G_CR2_FC = 6,
IONIC_XCVR_PID_QSFP_50G_CR2 = 7,
IONIC_XCVR_PID_QSFP_200G_CR4 = 8,
IONIC_XCVR_PID_QSFP_400G_CR4 = 9,
/* Fiber */
IONIC_XCVR_PID_QSFP_100G_AOC = 50,
IONIC_XCVR_PID_QSFP_100G_ACC = 51,
@@ -1303,6 +1306,15 @@ enum ionic_xcvr_pid {
IONIC_XCVR_PID_SFP_25GBASE_ACC = 71,
IONIC_XCVR_PID_SFP_10GBASE_T = 72,
IONIC_XCVR_PID_SFP_1000BASE_T = 73,
IONIC_XCVR_PID_QSFP_200G_AOC = 74,
IONIC_XCVR_PID_QSFP_200G_FR4 = 75,
IONIC_XCVR_PID_QSFP_200G_DR4 = 76,
IONIC_XCVR_PID_QSFP_200G_SR4 = 77,
IONIC_XCVR_PID_QSFP_200G_ACC = 78,
IONIC_XCVR_PID_QSFP_400G_FR4 = 79,
IONIC_XCVR_PID_QSFP_400G_DR4 = 80,
IONIC_XCVR_PID_QSFP_400G_SR4 = 81,
IONIC_XCVR_PID_QSFP_400G_VR4 = 82,
};
/**
@@ -1404,6 +1416,8 @@ struct ionic_xcvr_status {
*/
union ionic_port_config {
struct {
#define IONIC_SPEED_400G 400000 /* 400G in Mbps */
#define IONIC_SPEED_200G 200000 /* 200G in Mbps */
#define IONIC_SPEED_100G 100000 /* 100G in Mbps */
#define IONIC_SPEED_50G 50000 /* 50G in Mbps */
#define IONIC_SPEED_40G 40000 /* 40G in Mbps */
@@ -3209,7 +3223,11 @@ union ionic_adminq_comp {
#define IONIC_BAR0_INTR_CTRL_OFFSET 0x2000
#define IONIC_DEV_CMD_DONE 0x00000001
#define IONIC_ASIC_TYPE_CAPRI 0
#define IONIC_ASIC_TYPE_NONE 0
#define IONIC_ASIC_TYPE_CAPRI 1
#define IONIC_ASIC_TYPE_ELBA 2
#define IONIC_ASIC_TYPE_GIGLIO 3
#define IONIC_ASIC_TYPE_SALINA 4
/**
* struct ionic_doorbell - Doorbell register layout

View File

@@ -3265,7 +3265,7 @@ int ionic_lif_alloc(struct ionic *ionic)
lif->netdev->min_mtu = max_t(unsigned int, ETH_MIN_MTU,
le32_to_cpu(lif->identity->eth.min_frame_size));
lif->netdev->max_mtu =
le32_to_cpu(lif->identity->eth.max_frame_size) - ETH_HLEN - VLAN_HLEN;
le32_to_cpu(lif->identity->eth.max_frame_size) - VLAN_ETH_HLEN;
lif->neqs = ionic->neqs_per_lif;
lif->nxqs = ionic->ntxqs_per_lif;

View File

@@ -81,8 +81,9 @@ static int ionic_error_to_errno(enum ionic_status_code code)
case IONIC_RC_EQTYPE:
case IONIC_RC_EQID:
case IONIC_RC_EINVAL:
case IONIC_RC_ENOSUPP:
return -EINVAL;
case IONIC_RC_ENOSUPP:
return -EOPNOTSUPP;
case IONIC_RC_EPERM:
return -EPERM;
case IONIC_RC_ENOENT: