arm64: dts: qcom: sm8650-mtp: connect USB-C SS port to QMP PHY

The lanes from the USB-C SS port are connected to the combo USB+DP QMP
PHY rather than the SS port of the USB controller. Move the connection
endpoint to the QMP PHY out port.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240429-usb-link-dtsi-v1-10-87c341b55cdf@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Dmitry Baryshkov
2024-04-29 15:43:47 +03:00
committed by Bjorn Andersson
parent fbb22a1822
commit c2f1d0c08f

View File

@@ -59,7 +59,7 @@ port@1 {
reg = <1>;
pmic_glink_ss_in: endpoint {
remote-endpoint = <&usb_1_dwc3_ss>;
remote-endpoint = <&usb_dp_qmpphy_out>;
};
};
};
@@ -853,10 +853,6 @@ &usb_1_dwc3_hs {
remote-endpoint = <&pmic_glink_hs_in>;
};
&usb_1_dwc3_ss {
remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
vdd-supply = <&vreg_l1i_0p88>;
vdda12-supply = <&vreg_l3i_1p2>;
@@ -873,6 +869,10 @@ &usb_dp_qmpphy {
status = "okay";
};
&usb_dp_qmpphy_out {
remote-endpoint = <&pmic_glink_ss_in>;
};
&xo_board {
clock-frequency = <76800000>;
};