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arm64: dts: apple: Add A8X devices
Add DTS files for the A8X SoC and the only device based on it, the iPad Air 2. Signed-off-by: Konrad Dybcio <konradybcio@kernel.org> [Markuss: System memory bits] Co-developed-by: Markuss Broks <markuss.broks@gmail.com> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> [Nick: SMP, m1n1 and gpio-keys support, pinctrl fixes] Co-developed-by: Nick Chan <towinchenmi@gmail.com> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Neal Gompa <neal@gompa.dev> Signed-off-by: Hector Martin <marcan@marcan.st>
This commit is contained in:
Konrad Dybcio
committed by
Hector Martin
Hector Martin
parent
1841831303
commit
c2da50cb54
@@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_APPLE) += t7000-j97.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t7000-n102.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t7000-n56.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t7000-n61.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t7001-j81.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t7001-j82.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb
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dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb
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74
arch/arm64/boot/dts/apple/t7001-air2.dtsi
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74
arch/arm64/boot/dts/apple/t7001-air2.dtsi
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@@ -0,0 +1,74 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple iPad Air 2 common device tree
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* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
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*/
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#include "t7001.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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chassis-type = "tablet";
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chosen {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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stdout-path = "serial0";
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framebuffer0: framebuffer@0 {
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compatible = "apple,simple-framebuffer", "simple-framebuffer";
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reg = <0 0 0 0>; /* To be filled by loader */
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/* Format properties will be added by loader */
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status = "disabled";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-home {
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label = "Home Button";
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gpios = <&pinctrl 0 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_HOMEPAGE>;
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wakeup-source;
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};
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button-power {
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label = "Power Button";
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gpios = <&pinctrl 1 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_POWER>;
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wakeup-source;
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};
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button-volup {
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label = "Volume Up";
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gpios = <&pinctrl 92 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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};
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button-voldown {
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label = "Volume Down";
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gpios = <&pinctrl 93 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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memory@800000000 {
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device_type = "memory";
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reg = <0x8 0 0 0>; /* To be filled by loader */
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* To be filled by loader */
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};
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};
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&serial0 {
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status = "okay";
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};
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14
arch/arm64/boot/dts/apple/t7001-j81.dts
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14
arch/arm64/boot/dts/apple/t7001-j81.dts
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@@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple iPad Air 2 (Wi-Fi), J81, iPad5,3 (A1566)
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* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
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*/
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/dts-v1/;
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#include "t7001-air2.dtsi"
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/ {
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compatible = "apple,j81", "apple,t7001", "apple,arm-platform";
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model = "Apple iPad Air 2 (Wi-Fi)";
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};
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14
arch/arm64/boot/dts/apple/t7001-j82.dts
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14
arch/arm64/boot/dts/apple/t7001-j82.dts
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@@ -0,0 +1,14 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple iPad Air 2 (Cellular), J82, iPad5,4 (A1567)
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* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
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*/
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/dts-v1/;
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#include "t7001-air2.dtsi"
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/ {
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compatible = "apple,j82", "apple,t7001", "apple,arm-platform";
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model = "Apple iPad Air 2 (Cellular)";
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};
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123
arch/arm64/boot/dts/apple/t7001.dtsi
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123
arch/arm64/boot/dts/apple/t7001.dtsi
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@@ -0,0 +1,123 @@
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// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Apple T7001 "A8X" SoC
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*
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* Copyright (c) 2022, Konrad Dybcio <konradybcio@kernel.org>
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* Based on Asahi Linux's M1 (t8103.dtsi) and Corellium's A10 efforts.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/apple-aic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/pinctrl/apple.h>
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/ {
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interrupt-parent = <&aic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &serial0;
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};
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clkref: clock-ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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clock-output-names = "clkref";
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};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "apple,typhoon";
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reg = <0x0 0x0>;
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cpu-release-addr = <0 0>; /* To be filled in by loader */
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enable-method = "spin-table";
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device_type = "cpu";
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};
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cpu1: cpu@1 {
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compatible = "apple,typhoon";
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reg = <0x0 0x1>;
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cpu-release-addr = <0 0>; /* To be filled in by loader */
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enable-method = "spin-table";
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device_type = "cpu";
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};
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cpu2: cpu@2 {
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compatible = "apple,typhoon";
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reg = <0x0 0x2>;
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cpu-release-addr = <0 0>; /* To be filled by loader */
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enable-method = "spin-table";
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device_type = "cpu";
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};
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <2>;
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nonposted-mmio;
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ranges;
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serial0: serial@20a0c0000 {
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compatible = "apple,s5l-uart";
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reg = <0x2 0x0a0c0000 0x0 0x4000>;
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reg-io-width = <4>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 158 IRQ_TYPE_LEVEL_HIGH>;
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/* Use the bootloader-enabled clocks for now. */
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clocks = <&clkref>, <&clkref>;
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clock-names = "uart", "clk_uart_baud0";
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status = "disabled";
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};
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wdt: watchdog@20e027000 {
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compatible = "apple,t7000-wdt", "apple,wdt";
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reg = <0x2 0x0e027000 0x0 0x1000>;
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clocks = <&clkref>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 4 IRQ_TYPE_LEVEL_HIGH>;
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};
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aic: interrupt-controller@20e100000 {
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compatible = "apple,t7000-aic", "apple,aic";
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reg = <0x2 0x0e100000 0x0 0x100000>;
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#interrupt-cells = <3>;
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interrupt-controller;
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};
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pinctrl: pinctrl@20e300000 {
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compatible = "apple,t7000-pinctrl", "apple,pinctrl";
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reg = <0x2 0x0e300000 0x0 0x100000>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl 0 0 184>;
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apple,npins = <184>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 62 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 63 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 64 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 65 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 66 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 67 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 68 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&aic>;
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interrupt-names = "phys", "virt";
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/* Note that A8X doesn't actually have a hypervisor (EL2 is not implemented). */
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interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
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<AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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