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staging:iio:cdc:ad7150: Timeout register covers both directions so both need updating
The timeout is treated as one single value, but the datasheet describes it as two 4 bit values, one for each direction of event. As such change the driver to support the separate directions. Also add limit checking to ensure it fits within the 4 bits. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20210314181511.531414-5-jic23@kernel.org
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@@ -49,6 +49,8 @@
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/* AD7150 masks */
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#define AD7150_THRESHTYPE_MSK GENMASK(6, 5)
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#define AD7150_CH_TIMEOUT_RECEDING GENMASK(3, 0)
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#define AD7150_CH_TIMEOUT_APPROACHING GENMASK(7, 4)
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/**
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* struct ad7150_chip_info - instance specific chip data
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* @client: i2c client for this device
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@@ -59,7 +61,9 @@
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* from 'average' value.
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* @thresh_timeout: a timeout, in samples from the moment an
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* adaptive threshold event occurs to when the average
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* value jumps to current value.
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* value jumps to current value. Note made up of two fields,
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* 3:0 are for timeout receding - applies if below lower threshold
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* 7:4 are for timeout approaching - applies if above upper threshold
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* @old_state: store state from previous event, allowing confirmation
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* of new condition.
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* @conversion_mode: the current conversion mode.
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@@ -191,7 +195,14 @@ static int ad7150_write_event_params(struct iio_dev *indio_dev,
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if (ret)
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return ret;
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timeout = chip->thresh_timeout[rising][chan];
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/*
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* Single timeout register contains timeouts for both
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* directions.
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*/
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timeout = FIELD_PREP(AD7150_CH_TIMEOUT_APPROACHING,
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chip->thresh_timeout[1][chan]);
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timeout |= FIELD_PREP(AD7150_CH_TIMEOUT_RECEDING,
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chip->thresh_timeout[0][chan]);
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return i2c_smbus_write_byte_data(chip->client,
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ad7150_addresses[chan][5],
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timeout);
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@@ -365,6 +376,9 @@ static ssize_t ad7150_store_timeout(struct device *dev,
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if (ret < 0)
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return ret;
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if (data > GENMASK(3, 0))
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return -EINVAL;
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mutex_lock(&chip->state_lock);
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switch (type) {
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case IIO_EV_TYPE_THRESH_ADAPTIVE:
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