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wifi: rtlwifi: Add rtl8192du/rf.{c,h}
These contain one RF configuration function and some functions related to dual MAC operation. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Link: https://msgid.link/36258d72-11fd-4f70-84c6-782972f706ed@gmail.com
This commit is contained in:
Bitterblue Smith
committed by
Ping-Ke Shih
Ping-Ke Shih
parent
8321424134
commit
c0e4ae46ff
240
drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.c
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240
drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.c
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@@ -0,0 +1,240 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2024 Realtek Corporation.*/
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#include "../wifi.h"
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#include "../rtl8192d/reg.h"
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#include "../rtl8192d/phy_common.h"
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#include "phy.h"
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#include "rf.h"
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bool rtl92du_phy_enable_anotherphy(struct ieee80211_hw *hw, bool bmac0)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = &rtlpriv->rtlhal;
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u8 mac_on_bit = bmac0 ? MAC1_ON : MAC0_ON;
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u8 mac_reg = bmac0 ? REG_MAC1 : REG_MAC0;
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bool bresult = true; /* true: need to enable BB/RF power */
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u32 maskforphyset = 0;
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u16 val16;
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u8 u1btmp;
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rtlhal->during_mac0init_radiob = false;
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rtlhal->during_mac1init_radioa = false;
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rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD, "===>\n");
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/* MAC0 Need PHY1 load radio_b.txt . Driver use DBI to write. */
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u1btmp = rtl_read_byte(rtlpriv, mac_reg);
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if (!(u1btmp & mac_on_bit)) {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "enable BB & RF\n");
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/* Enable BB and RF power */
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maskforphyset = bmac0 ? MAC0_ACCESS_PHY1 : MAC1_ACCESS_PHY0;
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val16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN | maskforphyset);
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val16 &= 0xfffc;
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rtl_write_word(rtlpriv, REG_SYS_FUNC_EN | maskforphyset, val16);
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val16 = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN | maskforphyset);
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val16 |= BIT(13) | BIT(0) | BIT(1);
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rtl_write_word(rtlpriv, REG_SYS_FUNC_EN | maskforphyset, val16);
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} else {
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/* We think if MAC1 is ON,then radio_a.txt
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* and radio_b.txt has been load.
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*/
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bresult = false;
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}
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rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD, "<===\n");
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return bresult;
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}
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void rtl92du_phy_powerdown_anotherphy(struct ieee80211_hw *hw, bool bmac0)
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{
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = &rtlpriv->rtlhal;
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u8 mac_on_bit = bmac0 ? MAC1_ON : MAC0_ON;
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u8 mac_reg = bmac0 ? REG_MAC1 : REG_MAC0;
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u32 maskforphyset = 0;
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u8 u1btmp;
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rtlhal->during_mac0init_radiob = false;
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rtlhal->during_mac1init_radioa = false;
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rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD, "====>\n");
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/* check MAC0 enable or not again now, if
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* enabled, not power down radio A.
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*/
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u1btmp = rtl_read_byte(rtlpriv, mac_reg);
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if (!(u1btmp & mac_on_bit)) {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "power down\n");
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/* power down RF radio A according to YuNan's advice. */
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maskforphyset = bmac0 ? MAC0_ACCESS_PHY1 : MAC1_ACCESS_PHY0;
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rtl_write_dword(rtlpriv, RFPGA0_XA_LSSIPARAMETER | maskforphyset,
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0x00000000);
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}
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rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD, "<====\n");
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}
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bool rtl92du_phy_rf6052_config(struct ieee80211_hw *hw)
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{
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bool mac1_initradioa_first = false, mac0_initradiob_first = false;
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bool need_pwrdown_radioa = false, need_pwrdown_radiob = false;
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struct rtl_priv *rtlpriv = rtl_priv(hw);
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struct rtl_hal *rtlhal = &rtlpriv->rtlhal;
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struct rtl_phy *rtlphy = &rtlpriv->phy;
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struct bb_reg_def *pphyreg;
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bool true_bpath = false;
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bool rtstatus = true;
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u32 u4_regvalue = 0;
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u8 rfpath;
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if (rtlphy->rf_type == RF_1T1R)
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rtlphy->num_total_rfpath = 1;
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else
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rtlphy->num_total_rfpath = 2;
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/* Single phy mode: use radio_a radio_b config path_A path_B
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* separately by MAC0, and MAC1 needn't configure RF;
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* Dual PHY mode: MAC0 use radio_a config 1st phy path_A,
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* MAC1 use radio_b config 2nd PHY path_A.
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* DMDP, MAC0 on G band, MAC1 on A band.
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*/
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if (rtlhal->macphymode == DUALMAC_DUALPHY) {
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if (rtlhal->current_bandtype == BAND_ON_2_4G &&
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rtlhal->interfaceindex == 0) {
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/* MAC0 needs PHY1 load radio_b.txt. */
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if (rtl92du_phy_enable_anotherphy(hw, true)) {
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rtlphy->num_total_rfpath = 2;
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mac0_initradiob_first = true;
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} else {
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/* We think if MAC1 is ON,then radio_a.txt and
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* radio_b.txt has been load.
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*/
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return rtstatus;
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}
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} else if (rtlhal->current_bandtype == BAND_ON_5G &&
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rtlhal->interfaceindex == 1) {
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/* MAC1 needs PHY0 load radio_a.txt. */
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if (rtl92du_phy_enable_anotherphy(hw, false)) {
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rtlphy->num_total_rfpath = 2;
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mac1_initradioa_first = true;
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} else {
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/* We think if MAC0 is ON, then radio_a.txt and
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* radio_b.txt has been load.
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*/
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return rtstatus;
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}
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} else if (rtlhal->interfaceindex == 1) {
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/* MAC0 enabled, only init radia B. */
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true_bpath = true;
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}
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}
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for (rfpath = 0; rfpath < rtlphy->num_total_rfpath; rfpath++) {
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/* Mac1 use PHY0 write */
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if (mac1_initradioa_first) {
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if (rfpath == RF90_PATH_A) {
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rtlhal->during_mac1init_radioa = true;
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need_pwrdown_radioa = true;
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} else if (rfpath == RF90_PATH_B) {
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rtlhal->during_mac1init_radioa = false;
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mac1_initradioa_first = false;
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rfpath = RF90_PATH_A;
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true_bpath = true;
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rtlphy->num_total_rfpath = 1;
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}
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} else if (mac0_initradiob_first) {
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/* Mac0 use PHY1 write */
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if (rfpath == RF90_PATH_A)
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rtlhal->during_mac0init_radiob = false;
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if (rfpath == RF90_PATH_B) {
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rtlhal->during_mac0init_radiob = true;
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mac0_initradiob_first = false;
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need_pwrdown_radiob = true;
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rfpath = RF90_PATH_A;
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true_bpath = true;
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rtlphy->num_total_rfpath = 1;
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}
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}
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pphyreg = &rtlphy->phyreg_def[rfpath];
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switch (rfpath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV);
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break;
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case RF90_PATH_B:
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case RF90_PATH_D:
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u4_regvalue = rtl_get_bbreg(hw, pphyreg->rfintfs,
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BRFSI_RFENV << 16);
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break;
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}
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rtl_set_bbreg(hw, pphyreg->rfintfe, BRFSI_RFENV << 16, 0x1);
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udelay(1);
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rtl_set_bbreg(hw, pphyreg->rfintfo, BRFSI_RFENV, 0x1);
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udelay(1);
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/* Set bit number of Address and Data for RF register */
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rtl_set_bbreg(hw, pphyreg->rfhssi_para2,
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B3WIREADDRESSLENGTH, 0x0);
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udelay(1);
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rtl_set_bbreg(hw, pphyreg->rfhssi_para2, B3WIREDATALENGTH, 0x0);
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udelay(1);
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switch (rfpath) {
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case RF90_PATH_A:
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if (true_bpath)
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rtstatus = rtl92du_phy_config_rf_with_headerfile(
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hw, radiob_txt,
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(enum radio_path)rfpath);
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else
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rtstatus = rtl92du_phy_config_rf_with_headerfile(
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hw, radioa_txt,
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(enum radio_path)rfpath);
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break;
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case RF90_PATH_B:
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rtstatus =
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rtl92du_phy_config_rf_with_headerfile(hw, radiob_txt,
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(enum radio_path)rfpath);
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break;
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case RF90_PATH_C:
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break;
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case RF90_PATH_D:
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break;
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}
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switch (rfpath) {
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case RF90_PATH_A:
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case RF90_PATH_C:
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rtl_set_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV,
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u4_regvalue);
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break;
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case RF90_PATH_B:
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case RF90_PATH_D:
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rtl_set_bbreg(hw, pphyreg->rfintfs, BRFSI_RFENV << 16,
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u4_regvalue);
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break;
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}
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if (!rtstatus) {
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rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
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"Radio[%d] Fail!!\n", rfpath);
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return rtstatus;
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}
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}
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/* check MAC0 enable or not again, if enabled,
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* not power down radio A.
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* check MAC1 enable or not again, if enabled,
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* not power down radio B.
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*/
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if (need_pwrdown_radioa)
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rtl92du_phy_powerdown_anotherphy(hw, false);
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else if (need_pwrdown_radiob)
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rtl92du_phy_powerdown_anotherphy(hw, true);
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rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "<---\n");
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return rtstatus;
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}
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11
drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.h
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11
drivers/net/wireless/realtek/rtlwifi/rtl8192du/rf.h
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@@ -0,0 +1,11 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2024 Realtek Corporation.*/
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#ifndef __RTL92DU_RF_H__
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#define __RTL92DU_RF_H__
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bool rtl92du_phy_rf6052_config(struct ieee80211_hw *hw);
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bool rtl92du_phy_enable_anotherphy(struct ieee80211_hw *hw, bool bmac0);
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void rtl92du_phy_powerdown_anotherphy(struct ieee80211_hw *hw, bool bmac0);
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#endif
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