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ARM: dts: aspeed: bletchley: Enable wdtrst1

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Enable WDTRST1 external signal to send a reset pulse to peripherals while
BMC reset.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20221226054535.2836110-3-potin.lai.pt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Potin Lai
2022-12-26 13:45:35 +08:00
committed by Joel Stanley
parent 107fb95f7b
commit c021d9fe41
1 changed files with 11 additions and 0 deletions
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11
arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts
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@@ -1064,3 +1064,14 @@ pinctrl_gpiov2_unbiased_default: gpiov2 {
bias-disable;
};
};
&wdt1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
aspeed,reset-type = "soc";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
aspeed,ext-pulse-duration = <256>;
};