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arm64: dts: hisilicon: Add clock nodes for Hi3670 SoC
Add clock nodes for HiSilicon Hi3670 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
committed by
Wei Xu
parent
651022382c
commit
c00e3f8080
@@ -7,6 +7,7 @@
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/hi3670-clock.h>
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/ {
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compatible = "hisilicon,hi3670";
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@@ -144,6 +145,48 @@ soc {
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#size-cells = <2>;
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ranges;
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crg_ctrl: crg_ctrl@fff35000 {
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compatible = "hisilicon,hi3670-crgctrl", "syscon";
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reg = <0x0 0xfff35000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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pctrl: pctrl@e8a09000 {
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compatible = "hisilicon,hi3670-pctrl", "syscon";
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reg = <0x0 0xe8a09000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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pmuctrl: crg_ctrl@fff34000 {
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compatible = "hisilicon,hi3670-pmuctrl", "syscon";
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reg = <0x0 0xfff34000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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sctrl: sctrl@fff0a000 {
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compatible = "hisilicon,hi3670-sctrl", "syscon";
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reg = <0x0 0xfff0a000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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iomcu: iomcu@ffd7e000 {
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compatible = "hisilicon,hi3670-iomcu", "syscon";
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reg = <0x0 0xffd7e000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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media1_crg: media1_crgctrl@e87ff000 {
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compatible = "hisilicon,hi3670-media1-crg", "syscon";
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reg = <0x0 0xe87ff000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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media2_crg: media2_crgctrl@e8900000 {
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compatible = "hisilicon,hi3670-media2-crg","syscon";
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reg = <0x0 0xe8900000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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uart6_clk: clk_19_2M {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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