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firmware: arm_scmi: Use 64-bit division for clock rate rounding

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SCMI clock range descriptors report rates as 64-bit values. When handling
a range clock, scmi_clock_determine_rate() rounds the requested rate up to
the next supported step using the SCMI RATE_STEP value.

The current code uses div64_ul() for this calculation. Since div64_ul()
takes an unsigned long divisor, the 64-bit RATE_STEP value can be truncated
on 32-bit builds. In the worst case, a non-zero 64-bit step can be narrowed
to zero before the division.

Store RATE_STEP in a u64, reject a malformed zero step, and use
DIV64_U64_ROUND_UP() so the divisor is handled as a 64-bit value.

This does not change behavior for valid firmware reporting a non-zero step
that fits in unsigned long.

Tested on Xunlong Orange Pi 5 Plus / RK3588 with SCMI over SMC. SCMI
clocks probed successfully before and after the change. SCMI-backed CPU
clocks were exercised through cpufreq-dt by switching each CPU policy
between its lowest and highest available OPP.

Fixes: ecde921eb4 ("firmware: arm_scmi: Add clock determine_rate operation")
Signed-off-by: Steve Dunnagan <sdunnaga@redhat.com>
Link: https://patch.msgid.link/20260701195923.444270-1-sdunnaga@redhat.com
Signed-off-by: Sudeep Holla <sudeep.holla@kernel.org>
This commit is contained in:
Steve Dunnagan
2026-07-01 15:59:20 -04:00
committed by Sudeep Holla
parent 05e5ffde9b
commit bf1deecccf
1 changed files with 8 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/firmware/arm_scmi/clock.c
View File

@@ -718,7 +718,7 @@ static int scmi_clock_rate_set(const struct scmi_protocol_handle *ph,
static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
u32 clk_id, unsigned long *rate)
{
u64 fmin, fmax, ftmp;
u64 fmin, fmax, ftmp, step;
struct scmi_clock_info *clk;
struct scmi_clock_desc *clkd;
struct clock_info *ci = ph->get_priv(ph);
@@ -749,11 +749,14 @@ static int scmi_clock_determine_rate(const struct scmi_protocol_handle *ph,
return 0;
}
ftmp = *rate - fmin;
ftmp += clkd->r.rates[RATE_STEP] - 1; /* to round up */
ftmp = div64_ul(ftmp, clkd->r.rates[RATE_STEP]);
step = clkd->r.rates[RATE_STEP];
if (!step)
return -EINVAL;
*rate = ftmp * clkd->r.rates[RATE_STEP] + fmin;
ftmp = *rate - fmin;
ftmp = DIV64_U64_ROUND_UP(ftmp, step);
*rate = ftmp * step + fmin;
return 0;
}