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arm64: dts: fsd: add sysreg device node

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Add SYSREG controller device node, which is available in PERIC, FSYS0,
FSYS1 and CAM block of FSD SoC.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
Reviewed-by: Ravi Patel <ravi.patel@samsung.com>
Link: https://lore.kernel.org/r/20221129115531.102932-3-sriranjani.p@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Sriranjani P
2022-11-29 17:25:31 +05:30
committed by Krzysztof Kozlowski
parent 0d6460bc6f
commit beaf55952d
1 changed files with 20 additions and 0 deletions
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20
arch/arm64/boot/dts/tesla/fsd.dtsi
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@@ -468,6 +468,11 @@ clock_csi: clock-controller@12610000 {
clock-names = "fin_pll";
};
sysreg_cam: system-controller@12630000 {
compatible = "tesla,fsd-cam-sysreg", "syscon";
reg = <0x0 0x12630000 0x0 0x500>;
};
clock_mfc: clock-controller@12810000 {
compatible = "tesla,fsd-clock-mfc";
reg = <0x0 0x12810000 0x0 0x3000>;
@@ -494,6 +499,11 @@ clock_peric: clock-controller@14010000 {
"dout_cmu_peric_shared1div4_dmaclk";
};
sysreg_peric: system-controller@14030000 {
compatible = "tesla,fsd-peric-sysreg", "syscon";
reg = <0x0 0x14030000 0x0 0x1000>;
};
clock_fsys0: clock-controller@15010000 {
compatible = "tesla,fsd-clock-fsys0";
reg = <0x0 0x15010000 0x0 0x3000>;
@@ -508,6 +518,11 @@ clock_fsys0: clock-controller@15010000 {
"dout_cmu_fsys0_shared0div4";
};
sysreg_fsys0: system-controller@15030000 {
compatible = "tesla,fsd-fsys0-sysreg", "syscon";
reg = <0x0 0x15030000 0x0 0x1000>;
};
clock_fsys1: clock-controller@16810000 {
compatible = "tesla,fsd-clock-fsys1";
reg = <0x0 0x16810000 0x0 0x3000>;
@@ -520,6 +535,11 @@ clock_fsys1: clock-controller@16810000 {
"dout_cmu_fsys1_shared0div4";
};
sysreg_fsys1: system-controller@16830000 {
compatible = "tesla,fsd-fsys1-sysreg", "syscon";
reg = <0x0 0x16830000 0x0 0x1000>;
};
mdma0: dma-controller@10100000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x0 0x10100000 0x0 0x1000>;