mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-07-21 23:57:36 -04:00
spi: atmel: fix DMA channel and bounce buffer leaks
The original code set use_dma to false when dma_alloc_coherent() for
bounce buffers failed, but DMA channels acquired earlier via
atmel_spi_configure_dma() were never freed.
When devm_request_irq() or clk_prepare_enable() failed later in probe,
the driver also did not release DMA channels or bounce buffers already
allocated.
The out_free_dma error path released DMA channels but did not free the
bounce buffers.
Fix by moving bounce buffer allocation into atmel_spi_configure_dma()
and registering the devres cleanup for DMA channels and bounce buffers.
Fixes: a9889ed62d ("spi: atmel: Implements transfers with bounce buffer")
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
Link: https://patch.msgid.link/20260522-atmel-v3-1-23f8c6e6aa43@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
@@ -559,6 +559,38 @@ static int atmel_spi_dma_slave_config(struct atmel_spi *as, u8 bits_per_word)
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return err;
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}
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static void atmel_spi_release_dma(void *data)
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{
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struct spi_controller *host = data;
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struct atmel_spi *as = spi_controller_get_devdata(host);
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struct device *dev = &as->pdev->dev;
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if (host->dma_tx) {
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dma_release_channel(host->dma_tx);
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host->dma_tx = NULL;
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}
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if (host->dma_rx) {
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dma_release_channel(host->dma_rx);
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host->dma_rx = NULL;
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}
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if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
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if (as->addr_tx_bbuf) {
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dma_free_coherent(dev, SPI_MAX_DMA_XFER,
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as->addr_tx_bbuf,
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as->dma_addr_tx_bbuf);
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as->addr_tx_bbuf = NULL;
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}
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if (as->addr_rx_bbuf) {
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dma_free_coherent(dev, SPI_MAX_DMA_XFER,
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as->addr_rx_bbuf,
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as->dma_addr_rx_bbuf);
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as->addr_rx_bbuf = NULL;
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}
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}
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}
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static int atmel_spi_configure_dma(struct spi_controller *host,
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struct atmel_spi *as)
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{
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@@ -569,7 +601,8 @@ static int atmel_spi_configure_dma(struct spi_controller *host,
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if (IS_ERR(host->dma_tx)) {
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err = PTR_ERR(host->dma_tx);
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dev_dbg(dev, "No TX DMA channel, DMA is disabled\n");
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goto error_clear;
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host->dma_tx = NULL;
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return err;
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}
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host->dma_rx = dma_request_chan(dev, "rx");
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@@ -580,26 +613,45 @@ static int atmel_spi_configure_dma(struct spi_controller *host,
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* requested tx channel.
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*/
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dev_dbg(dev, "No RX DMA channel, DMA is disabled\n");
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goto error;
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host->dma_rx = NULL;
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goto err_release_dma;
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}
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err = atmel_spi_dma_slave_config(as, 8);
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if (err)
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goto error;
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goto err_release_dma;
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if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
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as->addr_tx_bbuf = dma_alloc_coherent(dev, SPI_MAX_DMA_XFER,
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&as->dma_addr_tx_bbuf,
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GFP_KERNEL | GFP_DMA);
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if (!as->addr_tx_bbuf) {
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err = -ENOMEM;
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goto err_release_dma;
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}
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as->addr_rx_bbuf = dma_alloc_coherent(dev, SPI_MAX_DMA_XFER,
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&as->dma_addr_rx_bbuf,
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GFP_KERNEL | GFP_DMA);
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if (!as->addr_rx_bbuf) {
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err = -ENOMEM;
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goto err_release_dma;
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}
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}
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err = devm_add_action_or_reset(dev, atmel_spi_release_dma, host);
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if (err)
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return err;
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dev_info(&as->pdev->dev,
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"Using %s (tx) and %s (rx) for DMA transfers\n",
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dma_chan_name(host->dma_tx),
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dma_chan_name(host->dma_rx));
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"Using %s (tx) and %s (rx) for DMA transfers\n",
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dma_chan_name(host->dma_tx), dma_chan_name(host->dma_rx));
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return 0;
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error:
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if (!IS_ERR(host->dma_rx))
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dma_release_channel(host->dma_rx);
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if (!IS_ERR(host->dma_tx))
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dma_release_channel(host->dma_tx);
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error_clear:
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host->dma_tx = host->dma_rx = NULL;
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err_release_dma:
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atmel_spi_release_dma(host);
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return err;
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}
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@@ -611,18 +663,6 @@ static void atmel_spi_stop_dma(struct spi_controller *host)
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dmaengine_terminate_all(host->dma_tx);
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}
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static void atmel_spi_release_dma(struct spi_controller *host)
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{
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if (host->dma_rx) {
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dma_release_channel(host->dma_rx);
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host->dma_rx = NULL;
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}
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if (host->dma_tx) {
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dma_release_channel(host->dma_tx);
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host->dma_tx = NULL;
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}
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}
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/* This function is called by the DMA driver from tasklet context */
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static void dma_callback(void *data)
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{
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@@ -1581,30 +1621,6 @@ static int atmel_spi_probe(struct platform_device *pdev)
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as->use_pdc = true;
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}
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if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
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as->addr_rx_bbuf = dma_alloc_coherent(&pdev->dev,
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SPI_MAX_DMA_XFER,
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&as->dma_addr_rx_bbuf,
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GFP_KERNEL | GFP_DMA);
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if (!as->addr_rx_bbuf) {
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as->use_dma = false;
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} else {
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as->addr_tx_bbuf = dma_alloc_coherent(&pdev->dev,
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SPI_MAX_DMA_XFER,
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&as->dma_addr_tx_bbuf,
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GFP_KERNEL | GFP_DMA);
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if (!as->addr_tx_bbuf) {
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as->use_dma = false;
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dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
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as->addr_rx_bbuf,
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as->dma_addr_rx_bbuf);
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}
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}
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if (!as->use_dma)
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dev_info(host->dev.parent,
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" can not allocate dma coherent memory\n");
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}
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if (as->caps.has_dma_support && !as->use_dma)
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dev_info(&pdev->dev, "Atmel SPI Controller using PIO only\n");
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@@ -1664,13 +1680,10 @@ static int atmel_spi_probe(struct platform_device *pdev)
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out_free_dma:
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pm_runtime_disable(&pdev->dev);
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pm_runtime_set_suspended(&pdev->dev);
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if (as->use_dma)
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atmel_spi_release_dma(host);
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spi_writel(as, CR, SPI_BIT(SWRST));
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spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
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clk_disable_unprepare(as->gclk);
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if (as->gclk)
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clk_disable_unprepare(as->gclk);
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out_disable_clk:
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clk_disable_unprepare(clk);
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@@ -1687,18 +1700,8 @@ static void atmel_spi_remove(struct platform_device *pdev)
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spi_unregister_controller(host);
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/* reset the hardware and block queue progress */
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if (as->use_dma) {
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if (as->use_dma)
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atmel_spi_stop_dma(host);
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atmel_spi_release_dma(host);
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if (IS_ENABLED(CONFIG_SOC_SAM_V4_V5)) {
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dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
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as->addr_tx_bbuf,
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as->dma_addr_tx_bbuf);
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dma_free_coherent(&pdev->dev, SPI_MAX_DMA_XFER,
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as->addr_rx_bbuf,
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as->dma_addr_rx_bbuf);
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}
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}
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spin_lock_irq(&as->lock);
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spi_writel(as, CR, SPI_BIT(SWRST));
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