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media: platform: mtk-mdp3: extend GCE event waiting in RDMA and WROT

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Support for multiple RDMA/WROT waits for GCE events.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Sebastian Fricke <sebastian.fricke@collabora.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Moudy Ho
2023-12-20 11:18:33 +01:00
committed by Mauro Carvalho Chehab
parent 4294b9d6c8
commit bd2fac0048
3 changed files with 23 additions and 8 deletions
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2
drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c
View File

@@ -56,8 +56,10 @@ static const struct mdp_platform_config mt8183_plat_cfg = {
.rdma_support_10bit = true,
.rdma_rsz1_sram_sharing = true,
.rdma_upsample_repeat_only = true,
.rdma_event_num = 1,
.rsz_disable_dcm_small_sample = false,
.wrot_filter_constraint = false,
.wrot_event_num = 1,
};
static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = {

27
drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c
View File

@@ -251,14 +251,20 @@ static int config_rdma_subfrm(struct mdp_comp_ctx *ctx,
static int wait_rdma_event(struct mdp_comp_ctx *ctx, struct mdp_cmdq_cmd *cmd)
{
const struct mdp_platform_config *mdp_cfg = __get_plat_cfg(ctx);
struct device *dev = &ctx->comp->mdp_dev->pdev->dev;
phys_addr_t base = ctx->comp->reg_base;
u8 subsys_id = ctx->comp->subsys_id;
if (ctx->comp->alias_id == 0)
MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]);
else
dev_err(dev, "Do not support RDMA1_DONE event\n");
if (!mdp_cfg)
return -EINVAL;
if (ctx->comp->alias_id >= mdp_cfg->rdma_event_num) {
dev_err(dev, "Invalid RDMA event %d\n", ctx->comp->alias_id);
return -EINVAL;
}
MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]);
/* Disable RDMA */
MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_EN, 0x0, BIT(0));
@@ -553,10 +559,15 @@ static int wait_wrot_event(struct mdp_comp_ctx *ctx, struct mdp_cmdq_cmd *cmd)
phys_addr_t base = ctx->comp->reg_base;
u8 subsys_id = ctx->comp->subsys_id;
if (ctx->comp->alias_id == 0)
MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]);
else
dev_err(dev, "Do not support WROT1_DONE event\n");
if (!mdp_cfg)
return -EINVAL;
if (ctx->comp->alias_id >= mdp_cfg->wrot_event_num) {
dev_err(dev, "Invalid WROT event %d!\n", ctx->comp->alias_id);
return -EINVAL;
}
MM_REG_WAIT(cmd, ctx->comp->gce_event[MDP_GCE_EVENT_EOF]);
if (mdp_cfg && mdp_cfg->wrot_filter_constraint)
MM_REG_WRITE(cmd, subsys_id, base, VIDO_MAIN_BUF_SIZE, 0x0,

2
drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h
View File

@@ -49,8 +49,10 @@ struct mdp_platform_config {
bool rdma_support_10bit;
bool rdma_rsz1_sram_sharing;
bool rdma_upsample_repeat_only;
u32 rdma_event_num;
bool rsz_disable_dcm_small_sample;
bool wrot_filter_constraint;
u32 wrot_event_num;
};
/* indicate which mutex is used by each pipepline */