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staging: comedi: 8253.h: remove unused header
All the comedi drivers have been converted to use the comedi_8254 module to provide support for the 8254 timers. Remove this unused header. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
committed by
Greg Kroah-Hartman
Greg Kroah-Hartman
parent
c0cfeca1a8
commit
bca3a6d182
@@ -1,347 +0,0 @@
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/*
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* comedi/drivers/8253.h
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* Header file for 8253
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*
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* COMEDI - Linux Control and Measurement Device Interface
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* Copyright (C) 2000 David A. Schleef <ds@schleef.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _8253_H
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#define _8253_H
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#include "../comedi.h"
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/*
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* Common oscillator base values in nanoseconds
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*/
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#define I8254_OSC_BASE_10MHZ 100
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#define I8254_OSC_BASE_5MHZ 200
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#define I8254_OSC_BASE_4MHZ 250
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#define I8254_OSC_BASE_2MHZ 500
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#define I8254_OSC_BASE_1MHZ 1000
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static inline void i8253_cascade_ns_to_timer(int i8253_osc_base,
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unsigned int *d1,
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unsigned int *d2,
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unsigned int *nanosec,
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unsigned int flags)
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{
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unsigned int divider;
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unsigned int div1, div2;
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unsigned int div1_glb, div2_glb, ns_glb;
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unsigned int div1_lub, div2_lub, ns_lub;
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unsigned int ns;
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unsigned int start;
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unsigned int ns_low, ns_high;
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static const unsigned int max_count = 0x10000;
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/*
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* exit early if everything is already correct (this can save time
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* since this function may be called repeatedly during command tests
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* and execution)
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*/
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div1 = *d1 ? *d1 : max_count;
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div2 = *d2 ? *d2 : max_count;
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divider = div1 * div2;
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if (div1 * div2 * i8253_osc_base == *nanosec &&
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div1 > 1 && div1 <= max_count && div2 > 1 && div2 <= max_count &&
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/* check for overflow */
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divider > div1 && divider > div2 &&
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divider * i8253_osc_base > divider &&
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divider * i8253_osc_base > i8253_osc_base) {
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return;
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}
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divider = *nanosec / i8253_osc_base;
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div1_lub = div2_lub = 0;
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div1_glb = div2_glb = 0;
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ns_glb = 0;
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ns_lub = 0xffffffff;
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div2 = max_count;
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start = divider / div2;
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if (start < 2)
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start = 2;
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for (div1 = start; div1 <= divider / div1 + 1 && div1 <= max_count;
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div1++) {
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for (div2 = divider / div1;
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div1 * div2 <= divider + div1 + 1 && div2 <= max_count;
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div2++) {
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ns = i8253_osc_base * div1 * div2;
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if (ns <= *nanosec && ns > ns_glb) {
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ns_glb = ns;
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div1_glb = div1;
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div2_glb = div2;
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}
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if (ns >= *nanosec && ns < ns_lub) {
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ns_lub = ns;
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div1_lub = div1;
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div2_lub = div2;
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}
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}
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}
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switch (flags & CMDF_ROUND_MASK) {
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case CMDF_ROUND_NEAREST:
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default:
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ns_high = div1_lub * div2_lub * i8253_osc_base;
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ns_low = div1_glb * div2_glb * i8253_osc_base;
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if (ns_high - *nanosec < *nanosec - ns_low) {
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div1 = div1_lub;
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div2 = div2_lub;
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} else {
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div1 = div1_glb;
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div2 = div2_glb;
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}
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break;
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case CMDF_ROUND_UP:
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div1 = div1_lub;
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div2 = div2_lub;
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break;
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case CMDF_ROUND_DOWN:
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div1 = div1_glb;
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div2 = div2_glb;
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break;
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}
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*nanosec = div1 * div2 * i8253_osc_base;
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/* masking is done since counter maps zero to 0x10000 */
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*d1 = div1 & 0xffff;
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*d2 = div2 & 0xffff;
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}
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#ifndef CMDTEST
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/*
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* i8254_load programs 8254 counter chip. It should also work for the 8253.
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* base_address is the lowest io address
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* for the chip (the address of counter 0).
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* counter_number is the counter you want to load (0,1 or 2)
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* count is the number to load into the counter.
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*
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* You probably want to use mode 2.
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*
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* Use i8254_mm_load() if you board uses memory-mapped io, it is
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* the same as i8254_load() except it uses writeb() instead of outb().
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*
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* Neither i8254_load() or i8254_read() do their loading/reading
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* atomically. The 16 bit read/writes are performed with two successive
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* 8 bit read/writes. So if two parts of your driver do a load/read on
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* the same counter, it may be necessary to protect these functions
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* with a spinlock.
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*
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* FMH
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*/
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#define i8254_control_reg 3
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static inline int i8254_load(unsigned long base_address, unsigned int regshift,
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unsigned int counter_number, unsigned int count,
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unsigned int mode)
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{
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unsigned int byte;
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if (counter_number > 2)
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return -1;
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if (count > 0xffff)
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return -1;
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if (mode > 5)
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return -1;
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if ((mode == 2 || mode == 3) && count == 1)
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return -1;
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byte = counter_number << 6;
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byte |= 0x30; /* load low then high byte */
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byte |= (mode << 1); /* set counter mode */
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outb(byte, base_address + (i8254_control_reg << regshift));
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byte = count & 0xff; /* lsb of counter value */
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outb(byte, base_address + (counter_number << regshift));
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byte = (count >> 8) & 0xff; /* msb of counter value */
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outb(byte, base_address + (counter_number << regshift));
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return 0;
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}
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static inline int i8254_mm_load(void __iomem *base_address,
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unsigned int regshift,
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unsigned int counter_number,
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unsigned int count,
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unsigned int mode)
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{
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unsigned int byte;
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if (counter_number > 2)
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return -1;
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if (count > 0xffff)
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return -1;
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if (mode > 5)
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return -1;
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if ((mode == 2 || mode == 3) && count == 1)
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return -1;
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byte = counter_number << 6;
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byte |= 0x30; /* load low then high byte */
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byte |= (mode << 1); /* set counter mode */
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writeb(byte, base_address + (i8254_control_reg << regshift));
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byte = count & 0xff; /* lsb of counter value */
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writeb(byte, base_address + (counter_number << regshift));
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byte = (count >> 8) & 0xff; /* msb of counter value */
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writeb(byte, base_address + (counter_number << regshift));
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return 0;
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}
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/* Returns 16 bit counter value, should work for 8253 also. */
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static inline int i8254_read(unsigned long base_address, unsigned int regshift,
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unsigned int counter_number)
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{
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unsigned int byte;
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int ret;
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if (counter_number > 2)
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return -1;
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/* latch counter */
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byte = counter_number << 6;
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outb(byte, base_address + (i8254_control_reg << regshift));
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/* read lsb */
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ret = inb(base_address + (counter_number << regshift));
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/* read msb */
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ret += inb(base_address + (counter_number << regshift)) << 8;
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return ret;
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}
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static inline int i8254_mm_read(void __iomem *base_address,
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unsigned int regshift,
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unsigned int counter_number)
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{
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unsigned int byte;
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int ret;
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if (counter_number > 2)
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return -1;
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/* latch counter */
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byte = counter_number << 6;
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writeb(byte, base_address + (i8254_control_reg << regshift));
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/* read lsb */
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ret = readb(base_address + (counter_number << regshift));
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/* read msb */
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ret += readb(base_address + (counter_number << regshift)) << 8;
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return ret;
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}
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/* Loads 16 bit initial counter value, should work for 8253 also. */
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static inline void i8254_write(unsigned long base_address,
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unsigned int regshift,
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unsigned int counter_number, unsigned int count)
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{
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unsigned int byte;
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if (counter_number > 2)
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return;
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byte = count & 0xff; /* lsb of counter value */
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outb(byte, base_address + (counter_number << regshift));
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byte = (count >> 8) & 0xff; /* msb of counter value */
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outb(byte, base_address + (counter_number << regshift));
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}
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static inline void i8254_mm_write(void __iomem *base_address,
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unsigned int regshift,
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unsigned int counter_number,
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unsigned int count)
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{
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unsigned int byte;
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if (counter_number > 2)
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return;
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byte = count & 0xff; /* lsb of counter value */
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writeb(byte, base_address + (counter_number << regshift));
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byte = (count >> 8) & 0xff; /* msb of counter value */
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writeb(byte, base_address + (counter_number << regshift));
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}
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/*
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* Set counter mode, should work for 8253 also.
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* Note: the 'mode' value is different to that for i8254_load() and comes
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* from the INSN_CONFIG_8254_SET_MODE command:
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* I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
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* OR'ed with:
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* I8254_BCD, I8254_BINARY
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*/
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static inline int i8254_set_mode(unsigned long base_address,
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unsigned int regshift,
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unsigned int counter_number, unsigned int mode)
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{
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unsigned int byte;
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if (counter_number > 2)
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return -1;
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if (mode > (I8254_MODE5 | I8254_BCD))
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return -1;
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byte = counter_number << 6;
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byte |= 0x30; /* load low then high byte */
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byte |= mode; /* set counter mode and BCD|binary */
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outb(byte, base_address + (i8254_control_reg << regshift));
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return 0;
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}
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static inline int i8254_mm_set_mode(void __iomem *base_address,
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unsigned int regshift,
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unsigned int counter_number,
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unsigned int mode)
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{
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unsigned int byte;
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if (counter_number > 2)
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return -1;
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if (mode > (I8254_MODE5 | I8254_BCD))
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return -1;
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byte = counter_number << 6;
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byte |= 0x30; /* load low then high byte */
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byte |= mode; /* set counter mode and BCD|binary */
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writeb(byte, base_address + (i8254_control_reg << regshift));
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return 0;
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}
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static inline int i8254_status(unsigned long base_address,
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unsigned int regshift,
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unsigned int counter_number)
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{
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outb(0xE0 | (2 << counter_number),
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base_address + (i8254_control_reg << regshift));
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return inb(base_address + (counter_number << regshift));
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}
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static inline int i8254_mm_status(void __iomem *base_address,
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unsigned int regshift,
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unsigned int counter_number)
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{
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writeb(0xE0 | (2 << counter_number),
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base_address + (i8254_control_reg << regshift));
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return readb(base_address + (counter_number << regshift));
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}
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#endif
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#endif
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