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drm/i915/dp: move g4x_dp_set_clock() call to g4x_dp_compute_config()

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It does not look like anything in intel_dp_compute_config() after the
g4x_dp_set_clock() call depends on the changes it makes, namely setting
dpll and clock_set in crtc_state. Move the call one level higher to
g4x_dp_compute_config() to reduce the clutter in
intel_dp_compute_config().

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241211125431.680227-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Jani Nikula
2024-12-11 14:54:31 +02:00
parent 0c638e861f
commit bc5b7ba159
3 changed files with 10 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/gpu/drm/i915/display/g4x_dp.c
View File

@@ -55,8 +55,8 @@ const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
return IS_CHERRYVIEW(i915) ? &chv_dpll[0] : &vlv_dpll[0];
}
void g4x_dp_set_clock(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
static void g4x_dp_set_clock(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
const struct dpll *divisor = NULL;
@@ -1228,11 +1228,18 @@ static int g4x_dp_compute_config(struct intel_encoder *encoder,
struct drm_connector_state *conn_state)
{
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
int ret;
if (HAS_PCH_SPLIT(i915) && encoder->port != PORT_A)
crtc_state->has_pch_encoder = true;
return intel_dp_compute_config(encoder, crtc_state, conn_state);
ret = intel_dp_compute_config(encoder, crtc_state, conn_state);
if (ret)
return ret;
g4x_dp_set_clock(encoder, crtc_state);
return 0;
}
static void g4x_dp_suspend_complete(struct intel_encoder *encoder)

6
drivers/gpu/drm/i915/display/g4x_dp.h
View File

@@ -19,8 +19,6 @@ struct intel_encoder;
#ifdef I915
const struct dpll *vlv_get_dpll(struct drm_i915_private *i915);
void g4x_dp_set_clock(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config);
bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
i915_reg_t dp_reg, enum port port,
enum pipe *pipe);
@@ -31,10 +29,6 @@ static inline const struct dpll *vlv_get_dpll(struct drm_i915_private *i915)
{
return NULL;
}
static inline void g4x_dp_set_clock(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
}
static inline bool g4x_dp_port_enabled(struct drm_i915_private *dev_priv,
i915_reg_t dp_reg, int port,
enum pipe *pipe)

3
drivers/gpu/drm/i915/display/intel_dp.c
View File

@@ -3172,9 +3172,6 @@ intel_dp_compute_config(struct intel_encoder *encoder,
if (pipe_config->splitter.enable)
pipe_config->dp_m_n.data_m *= pipe_config->splitter.link_count;
if (!HAS_DDI(dev_priv))
g4x_dp_set_clock(encoder, pipe_config);
intel_vrr_compute_config(pipe_config, conn_state);
intel_dp_compute_as_sdp(intel_dp, pipe_config);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);