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clk: renesas: rzg2l: Simplify .determine_rate()

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rzg2l_cpg_sd_clk_mux_determine_rate() is the same as
__clk_mux_determine_rate_closest(), so use the latter to save some LoC.

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/fed02e0325275df84e2d76f8c481e40e7023cbd9.1688760372.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Christophe JAILLET
2023-07-07 22:06:27 +02:00
committed by Geert Uytterhoeven
parent 6337029842
commit bbceb13ce2
1 changed files with 1 additions and 7 deletions
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8
drivers/clk/renesas/rzg2l-cpg.c
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@@ -182,12 +182,6 @@ rzg2l_cpg_mux_clk_register(const struct cpg_core_clk *core,
return clk_hw->clk;
}
static int rzg2l_cpg_sd_clk_mux_determine_rate(struct clk_hw *hw,
struct clk_rate_request *req)
{
return clk_mux_determine_rate_flags(hw, req, CLK_MUX_ROUND_CLOSEST);
}
static int rzg2l_cpg_sd_clk_mux_set_parent(struct clk_hw *hw, u8 index)
{
struct sd_hw_data *hwdata = to_sd_hw_data(hw);
@@ -250,7 +244,7 @@ static u8 rzg2l_cpg_sd_clk_mux_get_parent(struct clk_hw *hw)
}
static const struct clk_ops rzg2l_cpg_sd_clk_mux_ops = {
.determine_rate = rzg2l_cpg_sd_clk_mux_determine_rate,
.determine_rate = __clk_mux_determine_rate_closest,
.set_parent = rzg2l_cpg_sd_clk_mux_set_parent,
.get_parent = rzg2l_cpg_sd_clk_mux_get_parent,
};