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arm64: dts: qcom: sdm845: Add UART nodes

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This adds nodes for all possible UARTs to sdm845.dtsi. By default
only configure the RX/TX lines with pinctrl. Boards that use UARTs
with flow control can overwrite the configuration in the
<board>.dtsi.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Matthias Kaehlcke
2018-10-03 17:24:09 -07:00
committed by Andy Gross
parent e0531312e7
commit bb2203d5f1
1 changed files with 270 additions and 0 deletions
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270
arch/arm64/boot/dts/qcom/sdm845.dtsi
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@@ -402,6 +402,17 @@ spi0: spi@880000 {
status = "disabled";
};
uart0: serial@880000 {
compatible = "qcom,geni-uart";
reg = <0x880000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c1: i2c@884000 {
compatible = "qcom,geni-i2c";
reg = <0x884000 0x4000>;
@@ -428,6 +439,17 @@ spi1: spi@884000 {
status = "disabled";
};
uart1: serial@884000 {
compatible = "qcom,geni-uart";
reg = <0x884000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c2: i2c@888000 {
compatible = "qcom,geni-i2c";
reg = <0x888000 0x4000>;
@@ -454,6 +476,17 @@ spi2: spi@888000 {
status = "disabled";
};
uart2: serial@888000 {
compatible = "qcom,geni-uart";
reg = <0x888000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart2_default>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c3: i2c@88c000 {
compatible = "qcom,geni-i2c";
reg = <0x88c000 0x4000>;
@@ -480,6 +513,17 @@ spi3: spi@88c000 {
status = "disabled";
};
uart3: serial@88c000 {
compatible = "qcom,geni-uart";
reg = <0x88c000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart3_default>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c4: i2c@890000 {
compatible = "qcom,geni-i2c";
reg = <0x890000 0x4000>;
@@ -506,6 +550,17 @@ spi4: spi@890000 {
status = "disabled";
};
uart4: serial@890000 {
compatible = "qcom,geni-uart";
reg = <0x890000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart4_default>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c5: i2c@894000 {
compatible = "qcom,geni-i2c";
reg = <0x894000 0x4000>;
@@ -532,6 +587,17 @@ spi5: spi@894000 {
status = "disabled";
};
uart5: serial@894000 {
compatible = "qcom,geni-uart";
reg = <0x894000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart5_default>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c6: i2c@898000 {
compatible = "qcom,geni-i2c";
reg = <0x898000 0x4000>;
@@ -558,6 +624,17 @@ spi6: spi@898000 {
status = "disabled";
};
uart6: serial@898000 {
compatible = "qcom,geni-uart";
reg = <0x898000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart6_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c7: i2c@89c000 {
compatible = "qcom,geni-i2c";
reg = <0x89c000 0x4000>;
@@ -583,6 +660,17 @@ spi7: spi@89c000 {
#size-cells = <0>;
status = "disabled";
};
uart7: serial@89c000 {
compatible = "qcom,geni-uart";
reg = <0x89c000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart7_default>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
qupv3_id_1: geniqup@ac0000 {
@@ -622,6 +710,17 @@ spi8: spi@a80000 {
status = "disabled";
};
uart8: serial@a80000 {
compatible = "qcom,geni-uart";
reg = <0xa80000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart8_default>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c9: i2c@a84000 {
compatible = "qcom,geni-i2c";
reg = <0xa84000 0x4000>;
@@ -685,6 +784,17 @@ spi10: spi@a88000 {
status = "disabled";
};
uart10: serial@a88000 {
compatible = "qcom,geni-uart";
reg = <0xa88000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart10_default>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c11: i2c@a8c000 {
compatible = "qcom,geni-i2c";
reg = <0xa8c000 0x4000>;
@@ -711,6 +821,17 @@ spi11: spi@a8c000 {
status = "disabled";
};
uart11: serial@a8c000 {
compatible = "qcom,geni-uart";
reg = <0xa8c000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart11_default>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c12: i2c@a90000 {
compatible = "qcom,geni-i2c";
reg = <0xa90000 0x4000>;
@@ -737,6 +858,17 @@ spi12: spi@a90000 {
status = "disabled";
};
uart12: serial@a90000 {
compatible = "qcom,geni-uart";
reg = <0xa90000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart12_default>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c13: i2c@a94000 {
compatible = "qcom,geni-i2c";
reg = <0xa94000 0x4000>;
@@ -763,6 +895,17 @@ spi13: spi@a94000 {
status = "disabled";
};
uart13: serial@a94000 {
compatible = "qcom,geni-uart";
reg = <0xa94000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart13_default>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c14: i2c@a98000 {
compatible = "qcom,geni-i2c";
reg = <0xa98000 0x4000>;
@@ -789,6 +932,17 @@ spi14: spi@a98000 {
status = "disabled";
};
uart14: serial@a98000 {
compatible = "qcom,geni-uart";
reg = <0xa98000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S6_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart14_default>;
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2c15: i2c@a9c000 {
compatible = "qcom,geni-i2c";
reg = <0xa9c000 0x4000>;
@@ -814,6 +968,17 @@ spi15: spi@a9c000 {
#size-cells = <0>;
status = "disabled";
};
uart15: serial@a9c000 {
compatible = "qcom,geni-uart";
reg = <0xa9c000 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S7_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart15_default>;
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
tcsr_mutex_regs: syscon@1f40000 {
@@ -1070,12 +1235,117 @@ pinmux {
};
};
qup_uart0_default: qup-uart0-default {
pinmux {
pins = "gpio2", "gpio3";
function = "qup0";
};
};
qup_uart1_default: qup-uart1-default {
pinmux {
pins = "gpio19", "gpio20";
function = "qup1";
};
};
qup_uart2_default: qup-uart2-default {
pinmux {
pins = "gpio29", "gpio30";
function = "qup2";
};
};
qup_uart3_default: qup-uart3-default {
pinmux {
pins = "gpio43", "gpio44";
function = "qup3";
};
};
qup_uart4_default: qup-uart4-default {
pinmux {
pins = "gpio91", "gpio92";
function = "qup4";
};
};
qup_uart5_default: qup-uart5-default {
pinmux {
pins = "gpio87", "gpio88";
function = "qup5";
};
};
qup_uart6_default: qup-uart6-default {
pinmux {
pins = "gpio47", "gpio48";
function = "qup6";
};
};
qup_uart7_default: qup-uart7-default {
pinmux {
pins = "gpio95", "gpio96";
function = "qup7";
};
};
qup_uart8_default: qup-uart8-default {
pinmux {
pins = "gpio67", "gpio68";
function = "qup8";
};
};
qup_uart9_default: qup-uart9-default {
pinmux {
pins = "gpio4", "gpio5";
function = "qup9";
};
};
qup_uart10_default: qup-uart10-default {
pinmux {
pins = "gpio53", "gpio54";
function = "qup10";
};
};
qup_uart11_default: qup-uart11-default {
pinmux {
pins = "gpio33", "gpio34";
function = "qup11";
};
};
qup_uart12_default: qup-uart12-default {
pinmux {
pins = "gpio51", "gpio52";
function = "qup12";
};
};
qup_uart13_default: qup-uart13-default {
pinmux {
pins = "gpio107", "gpio108";
function = "qup13";
};
};
qup_uart14_default: qup-uart14-default {
pinmux {
pins = "gpio31", "gpio32";
function = "qup14";
};
};
qup_uart15_default: qup-uart15-default {
pinmux {
pins = "gpio83", "gpio84";
function = "qup15";
};
};
};
usb_1_hsphy: phy@88e2000 {