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ARM: dts: stm32: lxa-mc1: enable DDR50 mode on eMMC
The "eMMC high-speed DDR mode (3.3V I/O)" at 50MHz is supported on the eMMC-interface of the lxa-mc1. Set it in the device tree to benefit from the speed improvement. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Holger Assmann <h.assmann@pengutronix.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
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Alexandre Torgue
parent
57592d2a98
commit
bae2b7f677
@@ -212,6 +212,7 @@ &sdmmc2 {
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pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
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pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
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bus-width = <8>;
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mmc-ddr-3_3v;
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no-1-8-v;
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no-sd;
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no-sdio;
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